HD6473258P10V Datasheet, PDF (298/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Table C-1. Pin States (cont.)
Pin
Name
P55 to P50,
P66 to P60,
P77/WAIT
P76 to P74,
AS, WR, RD,
P73 to P70,
MCU
Mode
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
Reset
3-State
3-State
3-State
High
3-State
3-State
Hardware
Standby
3-State
Software
Standby
Prev. state
(note 3)
Sleep
Mode
Prev. state
3-State
Prev. state Prev. state
(note 3)
3-State 3-state 3-state
3-State
Prev. state Prev. state
High
High
3-State
Prev. state Prev. state
Prev. state Prev. state
Normal
Operation
I/O port
I/O port
WAIT
I/O port
AS, WR,
RD
I/O port
I/O port
Notes:
1. 3-state: High-impedance state
2. Prev. state: Previous state. Input ports are in the high-impedance state (with the MOS pull-up
on if DDR = 0 and DR = 1). Output ports hold their previous output level.
3. On-chip supporting modules are initialized, so these pins revert to I/O ports according to the
DDR and DR bits.
4. I/O port: Direction depends on the data direction (DDR) bit. Note that these pins may also be
used by the on-chip supporting modules.
See section 5, I/O Ports for further information.
302