HD64F3687GFPV Datasheet, PDF (83/538 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 3 Exception Handling
Relative Module Exception Sources
Vector
Number
Vector Address Priority
IIC2
Transmit data empty
24
H'0030 to H'0031 High
Transmit end
Receive data full
Arbitration lost/Overrun error
NACK detection
Stop conditions detected
A/D converter
A/D conversion end
25
H'0032 to H'0033
Timer Z
Compare match/input capture 26
A0 to D0
Timer Z overflow
H'0034 to H'0035
Compare match/input capture 27
A1 to D1
Timer Z overflow
Timer Z underflow
H'0036 to H'0037
Timer B1
Timer B1 overflow
29
H'003A to H'003B
SCI3_2
Receive data full
32
H'0040 to H'0041
Transmit data empty
Transmit end
Receive error
Low
Note: * A low-voltage detection interrupt is enabled only in the product with an on-chip power-
on reset and low-voltage detection circuit.
3.2 Register Descriptions
Interrupts are controlled by the following registers.
• Interrupt edge select register 1 (IEGR1)
• Interrupt edge select register 2 (IEGR2)
• Interrupt enable register 1 (IENR1)
• Interrupt enable register 2 (IENR2)
• Interrupt flag register 1 (IRR1)
• Interrupt flag register 2 (IRR2)
• Wakeup interrupt flag register (IWPR)
Rev.5.00 Nov. 02, 2005 Page 49 of 500
REJ09B0027-0500