HD64F3687GFPV Datasheet, PDF (269/538 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 13 Timer Z
φ
FTIO pin
Input capture
signal
TCNT
GRA
n
n+1
M
n
N
N+1
n
N
GRC
m
M
M
n
Figure 13.41 Input Capture Timing of Buffer Operation
Figures 13.42 and 13.43 show the operation examples when buffer operation has been designated
for GRB_0 and GRD_0 in complementary PWM mode. These are examples when a PWM
waveform of 0% duty is created by using the buffer operation and performing GRD_0 ≥ GRA_0.
Data is transferred from GRD_0 to GRB_0 according to the settings of CMD_0 and CMD_1 when
TCNT_0 and GRA_0 are compared and their contents match or when TCNT_1 underflows.
However, when GRD_0 ≥ GRA_0, data is transferred from GRD_0 to GRB_0 when TCNT_1
underflows regardless of the setting of CMD_0 and CMD_1. When GRD_0 = H'0000, data is
transferred from GRD_0 to GRB_0 when TCNT_0 and GRA_0 are compared and their contents
match regardless of the settings of CMD_0 and CMD_1.
Rev.5.00 Nov. 02, 2005 Page 235 of 500
REJ09B0027-0500