H8S14 Datasheet, PDF (635/938 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 15 ROM
Subroutine: Write Pulse
Start of subroutine
Enable WDT
Set PSU1 bit in FLMCR1
Wait 50 μs: tSPSU
Set P1 bit in FLMCR1
Wait: tSP10, tSP30 or tSP200
*5
Clear P1 bit in FLMCR1
Wait 5 μs: tCP
Clear PSU1 bit in FLMCR1
Wait 5 μs: tCPSU
Disable WDT
Return
Note: 6. Write Pulse Width
Number of Writes n
1
2
3
4
5
6
7
8
9
10
11
12
1...3
Write Time (tSP30/tSP200) µs
tSP30
tSP30
tSP30
tSP30
tSP30
tSP30
tSP200
tSP200
tSP200
tSP200
tSP200
tSP200
tSP_...200
998
999
1000
tSP200
tSP200
tSP200
Note: Use a tSP10 write pulse for additional programming.
Increment
address
Start
Set SWE1 bit in FLMCR1
Wait 1 μs: tSSWE
Store 128 bytes program data in program
data area and reprogram data area
*4
n=1
Data writes must be performed
in the memory-erased state.
Do not write additional data to
an address to which data is
already written.
m=0
Successively write 128-byte data from
reprogram data area in RAM to flash memory ^*1
Write Pulse (tSP30 or tSP200)
Set PV1 bit in FLMCR1
Wait 4 μs: tSPV
Subroutine call
See Note 6 for pulse width
Perform H'FF dummy-write to verify address
Wait 2 μs: tSPVR
Read verify data
*2
n←n+1
Write data =
No
verify data?
Yes
6 ≥ n?
No
Yes
Compute additional-programming data
Transfer additional-programming data
to additional-programming data area
m=1
*4
Compute reprogram data
*3
Transfer reprogram data to reprogram
data area
*4
RAM
No
Program data storage area
(128 bytes)
Reprogram data storage area
(128 bytes)
Additional program data
storage area (128 bytes)
Notes: 1. Transfer data in byte units. The lower eight bits of the start
address to which data is written must be H'00 or H'80.
Transfer 128-byte data even when writing fewer than 128 bytes.
In this case, set H'FF in unused addresses.
2. Read verify data in longword form (32 bits).
3. Even for bits to which data is already written, an additional write
should be performed if their verify result is NG.
4. A 128-byte area for storing program data, a 128-byte area for
storing reprogram data, and a 128-byte area for storing additional
program data must be provided in RAM. The reprogram and
additional program data contents are modified as programming
proceeds.
5. A write pulse of tSP30 or tSP200 is applied according to the
progress of the programming operation. See Note 6 for the pulse
widths. When writing of the additional program data is executed,
a tSP10 write pulse should be applied. Reprogram data X' means
reprogram data when the pulse is applied.
128 byte data
verify complete?
Yes
Clear PV1 bit in FLMCR1
Wait 2 μs: tCPV
No
6 ≥ n?
Yes
Successively write 128-byte data
from additional-programming data area *1
in RAM to flash memory
Subroutine call
Write Pulse (tSP10)
No
m = 0?
Yes
Clear SWE1 bit in FLMCR1
Wait 100 μs: tCSWE
Programming end
n ≥ 1000?
No
Yes
Clear SWE1 bit in FLMCR1
Wait 100 μs: tCSWE
Programming failure
Reprogram Data Computation Table
Original Data Verify Data Reprogram Data
(D)
(V)
(X)
Comments
0
0
0
1
1
Programming complete.
0
Programming is incomplete;
reprogramming should be performed.
1
0
1
—
1
1
1
Left in the erased state.
Additional-Programming Data Computation Table
Reprogram Data Verify Data Additional-Programming
(X')
(V)
Data (Y)
Comments
0
0
0
Additional programming executed
0
1
1
Additional programming not executed
1
0
1
Additional programming not executed
1
1
1
Additional programming not executed
Figure 15.14 Program/Program-Verify Flowchart
Rev.4.00 Sep. 18, 2008 Page 573 of 872
REJ09B0189-0400