H8S14 Datasheet, PDF (453/938 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

10.4 Operation
Section 10 16-Bit Timer Pulse Unit (TPU)
10.4.1 Overview
Operation in each mode is outlined below.
(1) Normal Operation
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, synchronous counting, and external event counting.
Each TGR can be used as an input capture register or output compare register.
(2) Synchronous Operation
When synchronous operation is designated for a channel, TCNT for that channel performs
synchronous presetting. That is, when TCNT for a channel designated for synchronous operation
is rewritten, the TCNT counters for the other channels are also rewritten at the same time.
Synchronous clearing of the TCNT counters is also possible by setting the timer synchronization
bits in TSYR for channels designated for synchronous operation.
(3) Buffer Operation
• When TGR is an output compare register
When a compare match occurs, the value in the buffer register for the relevant channel is
transferred to TGR.
• When TGR is an input capture register
When input capture occurs, the value in TCNT is transfer to TGR and the value previously
held in TGR is transferred to the buffer register.
(4) PWM Mode
In this mode, a PWM waveform is output. The output level can be set by means of TIOR. A PWM
waveform with a duty of between 0% and 100% can be output, according to the setting of each
TGR register.
(5) Phase Counting Mode
In this mode, TCNT is incremented or decremented by detecting the phases of two clocks input
from the external clock input pins in channels 1 and 2. When phase counting mode is set, the
corresponding TCLK pin functions as the clock pin, and TCNT performs up- or down-counting.
Rev.4.00 Sep. 18, 2008 Page 391 of 872
REJ09B0189-0400