H838776 Datasheet, PDF (520/594 Pages) Renesas Technology Corp – 12 Input / 9 Output Video Switch Matrix with Input Clamp, Input Bias Circuitry, and Output Drivers

Section 23 Electrical Characteristics
Applicable
Values
Reference
Item
Symbol Pins
Test Condition
Min. Typ. Max. Unit Figure
Input pin high width t
IH
IRQ0, IRQ1,
NMI, IRQ3,
IRQ4, IRQAEC,
WKP0 to WKP7,
TMIF, ADTRG
2
—
—
t
Figure 23.4
cyc
t_subcyc
AEVL, AEVH V = 2.7 to 3.6 V 50
—
—
ns
CC
V = 1.8 to 3.6 V 110 —
—
CC
t
TCKWH
TCLKA, TCLKB, Single edge
TCLKC,
specified
TIOCA1,
TIOCB1,
TIOCA2,
TIOCB2
1.5
—
—
t
Figure 23.7
cyc
Both edges
specified
2.5
—
—
Input pin low width
t_IL
IRQ0, IRQ1,
NMI, IRQ3,
IRQ4,
IRQAEC,
WKP0 to WKP7,
TMIF, ADTRG
2
—
—
t_cyc
Figure 23.4
t
subcyc
AEVL, AEVH
V = 2.7 to 3.6 V 50
CC
—
—
ns
V = 1.8 to 3.6 V 110 —
—
CC
t_TCKWL
TCLKA, TCLKB, Single edge
TCLKC,
specified
TIOCA1,
TIOCB1,
TIOCA2,
TIOCB2
1.5
—
—
t_cyc
Figure 23.7
Both edges
specified
2.5
—
—
Notes: 1. Selected with the SA1 and SA0 bits in the system control register 2 (SYSCR2).
2. The value in parentheses is t_OSC (max.) when an external clock is used.
3. For details on the power-on reset characteristics, refer to table 23.16 and figure 23.1.
4. This specification may range from the minimum value to the maximum value because of
the temperature, power voltage, and dispersion of product lots. Care should be taken
for the specification range in designing the system. As for actual specification, please
refer to our web site.
Rev. 1.00 Dec. 18, 2006 Page 498 of 568
REJ09B0348-0100