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H838776 Datasheet, PDF (505/594 Pages) Renesas Technology Corp – 12 Input / 9 Output Video Switch Matrix with Input Clamp, Input Bias Circuitry, and Output Drivers
Section 23 Electrical Characteristics
23.2.5 Power-On Reset Circuit Characteristics
Table 23.7 lists the power-on reset circuit characteristics.
Table 23.7 Power-On Reset Circuit Characteristics
VCC = 1.8 V to 3.6 V, AVCC = 1.8 V to 3.6 V, VSS = AVSS = 0.0 V,
Ta = −20 to +75°C (regular specifications), Ta = −40 to +85°C (wide-range specifications),
unless otherwise specified.
Item
Symbol
Reset voltage
V_rst
Power supply rise time t_vtr
Test Condition
Reset count time
Count start time
t_out
t_cr
On-chip pull-up
Rp
resistance
Vcc = 3.0 V
Values
Min.
Typ.
Max.
Unit Notes
0.7Vcc
0.8Vcc
0.9Vcc
V
The Vcc rise time should be shorter than half the
RES rise time.
0.8
—
4.0
µs
Adjustable by the value of the external capacitor
of the RES pin.
60
100
—
kΩ
23.2.6 Watchdog Timer Characteristics
Table 23.8 Watchdog Timer Characteristics
VCC = 1.8 V to 3.6 V, AVCC = 1.8 V to 3.6 V, VSS = AVSS = 0.0 V,
Ta = −20 to +75°C (regular specifications), Ta = −40 to +85°C (wide-range specifications),
unless otherwise specified.
Item
On-chip oscillator
overflow time
Symbol
t
ovf
Applicable
Pins
Test Condition Min.
0.2
Values
Typ.
0.4
Max. Unit
—s
Notes
Rev. 1.00 Dec. 18, 2006 Page 483 of 568
REJ09B0348-0100