4570 Datasheet, PDF (51/69 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
CONTROL REGISTERS
Interrupt control register V1
V13 Timer 2 interrupt enable bit
V12 Timer 1 interrupt enable bit
V11 Not used
V10 External 0 interrupt enable bit
at reset : 00002
RAM back-up : 00002
R/W
0 Interrupt disabled (SNZT2 instruction is valid)
1 Interrupt enabled (SNZT2 instruction is invalid)
0 Interrupt disabled (SNZT1 instruction is valid)
1 Interrupt enabled (SNZT1 instruction is invalid)
0
This bit has no function, but read/write is enabled.
1
0 Interrupt disabled (SNZ0 instruction is valid)
1 Interrupt enabled (SNZ0 instruction is invalid)
Interrupt control register V2
V23 Not used
V22 Not used
V21 Not used
V20 Timer 3 interrupt enable bit
at reset : 00002
at RAM back-up : 00002
R/W
0
1 ^{This bit has no function, but read/write is enabled.}
0
1 ^{This bit has no function, but read/write is enabled.}
0
This bit has no function, but read/write is enabled.
1
0 Interrupt disabled (SNZT3 instruction is valid)
1 Interrupt enabled (SNZT3 instruction is invalid)
Interrupt control register I1
at reset : 00002
at RAM back-up : state retained
R/W
I13 Not used
0
This bit has no function, but read/write is enabled.
1
0 Falling waveform (“L” level of INT pin is recognized with the SNZI0
Interrupt valid waveform for INT pin /return
instruction)/“L” level
I12
level selection bit (Note 2)
1 Rising waveform (“H” level of INT pin is recognized with the SNZI0
instruction)/“H” level
I11 Not used
0
This bit has no function, but read/write is enabled.
1
I10 Not used
0
This bit has no function, but read/write is enabled.
1
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: Depending on the input state of P21/INT pin, the external interrupt request flag EXF0 may be set to “1” when the contents
of I12 is changed. Accordingly, set a value to bit 2 of register I1 and execute the SNZ0 instruction to clear the EXF0 flag after
executing at least one instruction.
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