4570 Datasheet, PDF (44/69 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MACHINE INSTRUCTIONS (CONTINUED)
Parameter
Instruction code
Mnemonic
Type of
instructions
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Hexadecimal
notation
Function
TAM j
101100j j j j
2C j 1
1 (A) ← (M(DP))
(X) ← (X)EXOR(j)
j = 0 to 15
XAM j
101101j j j j
2D j 1
1 (A) ← → (M(DP))
(X) ← (X)EXOR(j)
j = 0 to 15
XAMD j
101111j j j j
2F j 1
1 (A) ← → (M(DP))
(X) ← (X)EXOR(j)
j = 0 to 15
(Y) ← (Y) – 1
XAMI j
101110j j j j
2E j 1
1 (A) ← → (M(DP))
(X) ← (X)EXOR(j)
j = 0 to 15
(Y) ← (Y) + 1
TMA j
101011j j j j
2B j 1
1 (M(DP)) ← (A)
(X) ← (X)EXOR(j)
j = 0 to 15
LA n
000111nnnn
07 n 1
1 (A) ← n
n = 0 to 15
TABP p
0 0 1 0 p5 p4 p3 p2 p1 p0 0 8 p 1
+p
3 (SP) ← (SP) + 1
(SK(SP)) ← (PC)
(PCH) ← p
(PCL) ← (DR2–DR0, A3–A0)
(W5) ← (ROM(PC))9 to 8
(B) ← (ROM(PC))7 to 4
(A) ← (ROM(PC))3 to 0
(PC) ← (SK(SP))
(SP) ← (SP) – 1
(Note)
Note: p is 0 to 31 for M34570M4 and p is 0 to 63 for M34570E8 and M34570M8.
p is 0 to 127 for M34570ED and M34570MD, and p6 is specified with the SBK and RBK instructions.
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Skip condition
Detailed description
–
– After transferring the contents of M(DP) to register A, an exclusive OR operation is performed between
register X and the value j in the immediate field, and stores the result in register X.
–
– After exchanging the contents of M(DP) with the contents of register A, an exclusive OR operation is
performed between register X and the value j in the immediate field, and stores the result in register X.
(Y) = 15
(Y) = 0
–
– After exchanging the contents of M(DP) with the contents of register A, an exclusive OR operation is
performed between register X and the value j in the immediate field, and stores the result in register X.
Subtracts 1 from the contents of register Y. As a result of subtraction, when the contents of register Y
is 15, the next instruction is skipped.
– After exchanging the contents of M(DP) with the contents of register A, an exclusive OR operation is
performed between register X and the value j in the immediate field, and stores the result in register X.
Adds 1 to the contents of register Y. As a result of addition, when the contents of register Y is 0, the
next instruction is skipped.
– After transferring the contents of register A to M(DP), an exclusive OR operation is performed between
register X and the value j in the immediate field, and stores the result in register X.
Continuous
description
–
– Loads the value n in the immediate field to register A.
When the LA instructions are continuously coded and executed, only the first LA instruction is executed
and other LA instructions coded continuously are skipped.
– Transfers bits 9 and 8 to register W5, bits 7 to 4 to register B and bits 3 to 0 to register A. These bits 9
to 0 are the ROM pattern in address (DR2 DR1 DR0 A3 A2 A1 A0)2 specified by registers A and D in
page p.
When this instruction is executed, 1 stage of stack register is used.
When this instruction is executed after executing the SBK instruction, pages 64 to 127 are specified.
When this instruction is executed after executing the RBK instruction, pages 0 to 63 are specified.
When this instruction is executed after system is released from reset or returned from RAM back-up,
pages 0 to 63 are specified.
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