4570 Datasheet, PDF (16/69 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
(6) Interrupt control register
q Interrupt control register V1
Interrupt enable bits of external 0, timer 1 and timer 2 are
assigned to register V1. Set the contents of this register
through register A with the TV1A instruction. The TAV1
instruction can be used to transfer the contents of register
V1 to register A.
q Interrupt control register V2
Interrupt enable bit of timer 3 is assigned to register V2.
Set the contents of this register through register A with the
TV2A instruction. The TAV2 instruction can be used to
transfer the contents of register V2 to register A.
Table 6 Interrupt control register
Interrupt control register V1
V13 Timer 2 interrupt enable bit
V12 Timer 1 interrupt enable bit
V11 Not used
V10 External 0 interrupt enable bit
at reset : 00002
RAM back-up : 00002
R/W
0 Interrupt disabled (SNZT2 instruction is valid)
1 Interrupt enabled (SNZT2 instruction is invalid)
0 Interrupt disabled (SNZT1 instruction is valid)
1 Interrupt enabled (SNZT1 instruction is invalid)
0
This bit has no function, but read/write is enabled.
1
0 Interrupt disabled (SNZ0 instruction is valid)
1 Interrupt enabled (SNZ0 instruction is invalid)
Interrupt control register V2
at reset : 00002
at RAM back-up : 00002
R/W
V23 Not used
0
1
This bit has no function, but read/write is enabled.
V22 Not used
0
1
This bit has no function, but read/write is enabled.
V21 Not used
0
This bit has no function, but read/write is enabled.
1
V20 Timer 3 interrupt enable bit
0 Interrupt disabled (SNZT3 instruction is valid)
1 Interrupt enabled (SNZT3 instruction is invalid)
Note: “R” represents read enabled, and “W” represents write enabled.
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