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4570 Datasheet, PDF (47/69 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MACHINE INSTRUCTIONS (CONTINUED)
Parameter
Instruction code
Mnemonic
Type of
instructions
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Hexadecimal
notation
Function
DI
0 0 0 0 0 0 0 1 0 0 0 0 4 1 1 (INTE) ← 0
EI
0 0 0 0 0 0 0 1 0 1 0 0 5 1 1 (INTE) ← 1
SNZ0
0000111000
03 8 1
1 (EXF0) = 1 ?
After skipping the next instruction,
(EXF0) ← 0
SNZI0
0 0 0 0 1 1 1 0 1 0 0 3 A 1 1 I12 = 1 : (INT) = “H” ?
I12 = 0 : (INT) = “L” ?
TAV1
TV1A
TAV2
TV2A
TAI1
TI1A
TAW1
TW1A
TAW2
TW2A
TAW3
TW3A
TAW5
TW5A
0 0 0 1 0 1 0 1 0 0 0 5 4 1 1 (A) ← (V1)
0 0 0 0 1 1 1 1 1 1 0 3 F 1 1 (V1) ← (A)
0 0 0 1 0 1 0 1 0 1 0 5 5 1 1 (A) ← (V2)
0 0 0 0 1 1 1 1 1 0 0 3 E 1 1 (V2) ← (A)
1 0 0 1 0 1 0 0 1 1 2 5 3 1 1 (A) ← (I1)
1 0 0 0 0 1 0 1 1 1 2 1 7 1 1 (I1) ← (A)
1 0 0 1 0 0 1 0 1 1 2 4 B 1 1 (A) ← (W1)
1 0 0 0 0 0 1 1 1 0 2 0 E 1 1 (W1) ← (A)
1 0 0 1 0 0 1 1 0 0 2 4 C 1 1 (A) ← (W2)
1 0 0 0 0 0 1 1 1 1 2 0 F 1 1 (W2) ← (A)
1 0 0 1 0 0 1 1 0 1 2 4 D 1 1 (A) ← (W3)
1 0 0 0 0 1 0 0 0 0 2 1 0 1 1 (W3) ← (A)
1 0 0 1 0 0 1 1 1 1 2 4 F 1 1 (A) ← (0, 0, W51, W50)
1 0 0 0 0 1 0 0 1 0 2 1 2 1 1 (W51, W50) ← (A1, A0)
50
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Skip condition
Detailed description
–
–
(EXF0) = 1
– Clears the interrupt enable flag INTE to “0,” and disables the interrupt.
– Sets the interrupt enable flag INTE to “1,” and enables the interrupt.
– Skips the next instruction when the contents of EXF0 flag is “1.”
After skipping, clears the EXF0 flag to “0.”
(INT) = “H”
However, I12 = 1
– When bit 2 (I12) of register I1 is “1” : Skips the next instruction when the level of INT pin is “H.”
(INT) = “L”
However, I12 = 0
– When bit 2 (I12) of register I1 is “0” : Skips the next instruction when the level of INT pin is “L.”
–
– Transfers the contents of interrupt control register V1 to register A.
–
– Transfers the contents of register A to interrupt control register V1.
–
– Transfers the contents of interrupt control register V2 to register A.
–
– Transfers the contents of register A to interrupt control register V2.
–
– Transfers the contents of interrupt control register I1 to register A.
–
– Transfers the contents of register A to interrupt control register I1.
–
– Transfers the contents of timer control register W1 to register A.
–
– Transfers the contents of register A to timer control register W1.
–
– Transfers the contents of timer control register W2 to register A.
–
– Transfers the contents of register A to timer control register W2.
–
– Transfers the contents of timer control register W3 to register A.
–
– Transfers the contents of register A to timer control register W3.
–
– Transfers the contents of timer count value store register W5 to the low-order 2 bits of register A. The
contents of the high-order 2 bits of register A is set to “0.”
–
– Transfers the contents of the low-order 2 bits of register A to timer count value store register W5.
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