4570 Datasheet, PDF (4/69 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
PERFORMANCE OVERVIEW
Parameter
Function
Number of basic instructions
99
Minimum instruction execution time 1.5 µs (f(XIN) = 2.0 MHz:system clock = f(XIN): VDD = 5.0 V)
2.86 µs (f(XIN) = 4.2 MHz:system clock = f(XIN)/4: VDD = 5.0 V)
Memory sizes ROM M34570M4 4096 words ! 10 bits
M34570M8 8192 words ! 10 bits
M34570MD 16384 words ! 10 bits
M34570E8 8192 words ! 10 bits
M34570ED 16384 words ! 10 bits
RAM
128 words ! 4 bits
Input/Output D0–D9 Output Ten independent output ports; port D9 is also used as the TOUT output pin.
ports
P00–P03 I/O
4-bit I/O port; every pin of the ports has a key-on wakeup function and a pull-up function.
P10–P13 I/O
4-bit I/O port; every pin of the ports has a key-on wakeup function and a pull-up function.
P20, P21 Input
2-bit input port, port P21 is also used as INT input pin.
P30–P33 I/O
4-bit I/O port
P40–P43 Input
4-bit input port; both pull-up function and key-on wakeup function can be switched by software.
CARR Output 1-bit output port (CMOS output)
TOUT
Output 1-bit output pin; TOUT output pin is also used as port D9.
INT
Input
1-bit input pin with a key-on wakeup function. INT input pin is also used as port P21.
Timers
Timer 1
10-bit timer with a reload register and carrier wave output auto-control function
Timer 2
8-bit timer with a reload register
Timer 3
8-bit timer with two reload registers and carrier wave generation function
Interrupt
Sources
4 (one for external and three for timer)
Nesting
1 level
Subroutine nesting
8 levels (however, only 7 levels can be used when an interrupt is used or the TABP p instruction
is executed)
Device structure
CMOS silicon gate
Package
36-pin plastic molded SSOP
Operating temperature range
–20 °C to 70 °C
Supply voltage
2.0 V to 5.5 V for mask ROM version (2.5 V to 5.5 V for One Time PROM version)
Power
at active
1.3 mA (f(XIN) = 4.2 MHz: system clock = f(XIN)/4, VDD=5.0 V)
dissipation
0.5 mA (f(XIN) = 1.0 MHz: system clock = f(XIN), VDD=3.0 V)
(typical value) at RAM back-up 0.1 µA (Ta=25 °C, VDD=5V, typical value)
DEFINITION OF CLOCK AND CYCLE
q System clock
The system clock is the basic clock for controlling this product.
The system clock can be selected by bit 3 of the clock control
register MR as shown in the table below.
Table Selection of system clock
MR3
System clock
0
f(XIN)
1
f(XIN)/4
Note: f(XIN)/4 is selected immediately after system is released
from reset.
q Instruction clock
The instruction clock is the standard clock for controlling CPU.
The instruction clock is a signal derived from dividing the
system clock by 3. The one cycle of the instruction clock is
equivalent to the one machine cycle.
q Machine cycle
The machine cycle is the standard cycle required to execute
the instruction.
3