4570 Datasheet, PDF (23/69 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Table 10 Timer control registers
Timer control register W1
W13 Prescaler control bit
W12 Prescaler dividing ratio selection bit
W11 Timer 1 count source selection bit
W10 Timer 1 control bit
at reset : 00002
at RAM back-up : 00002
R/W
0 Stop (prescaler state initialized)
1 Operating
0 Instruction clock divided by 4
1 Instruction clock divided by 8
0 Prescaler output (ORCLK)
1 Carrier output (CARRY)
0 Stop (state retained)
1 Operating
Timer control register W2
W23 Timer 2 control bit
W22 Port D9/TOUT pin function selection bit
W21
Timer 2 count source selection bits
W20
at reset : 00002
at RAM back-up : state retained
0 Stop (state retained)
1 Operating
0 ^{Port D9}
1 ^{TOUT pin}
W21 W20
Count source
0 0 Prescaler output (ORCLK)
0 1 Timer 1 underflow signal
1 0 Instruction clock
1 1 16-bit timer underflow signal
R/W
Timer control register W3
W33 Timer 3 control bit
W32 Not used
W31
Timer 3 count source selection bits
W30
at reset : 00002
at RAM back-up : state retained
R/W
0 Stop (state retained)
1 Operating
0
This bit has no function, but read/write is enabled.
1
W31 W30
Count source
0 0 Timer 2 underflow signal
0 1 Prescaler output (ORCLK)
1 0 f(XIN) or f(XIN)/2
1 1 Not available
Timer count value store register W5
at reset : 002
at RAM back-up : state retained
R/W
2-bit register. The contents of the high-order 2 bits (bits 9 and 8) of the 10-bit ROM pattern at address (D2D1D0A3A2A1A0) in page
p specified by registers D and A is stored in this register W5 with the TABP p instruction.
In addition, data can be transferred between the low-order 2 bits of register A and this register W5 with the TW5A or TAW5
instruction. Data can be read/written to/from the high-order 2 bits of timer 1 with the T1AB or TAB1 instruction.
Note: “R” represents read enabled, and “W” represents write enabled.
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