7480 Datasheet, PDF (33/98 Pages) Bi technologies – 7/8 Diameter 5-Turn Wirewound Precision Potentiometer

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MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
(2) Asynchronous Serial I/O (UART) Mode
The UART mode can be selected by clearing the serial I/O mode
selection bit of the serial I/O control register to “0”.
Eight serial data transfer formats can be selected, and the transfer
formats to be used by a transmitter and a receiver must be identi-
cal.
Each of the transmit and receive registers has a buffer register
(the same address on memory). Since the shift register cannot be
written to or read from directly, transmit data is written to the trans-
mit buffer register and receive data is read from the receive buffer
register. These buffer registers can also hold the next data to be
transmitted and receive 2-byte receive data in succession.
RXD
Data bus
P14
Receive enable bit (RE)
Address 00E216
Address 00E016 ^{Serial I/O control register}
ST detection
7-bit
OE ^{Receive buffer register}
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
8-bit
Character length
selection bit (CHAS) _{PE FE} SP detection
Clock control circuit
1/16
UART control register
Address 00E316
Serial I/O enable bit (SIOE)
Serial I/O synchronous clock selection bit (SCS)
SCLK
XIN
1/4
BRG count source
selection bit (CSS)
1/4
Frequency division ratio 1/(n+1)
Baud rate generator
Address 00E416
Serial I/O synchronous clock
selection bit (SCS)
ST/SP/PA generation 1/16
TXD
Transmit enable bit (TE) _{Transmit shift register}
Character length
Transmit interrupt
selection bit
source selection bit (TIC)
P16 P15 _(CHAS)
Transmit buffer register
Address 00E016
Data bus
Transmit shift register shift completion flag (TSC)
Transmit interrupt request (TI)
Transmit buffer empty flag (TBE)
Address 00E116
Serial I/O status register
Fig. 30 Block diagram of UART serial I/O
Transmit or receive clock
Transmit buffer register
write signal
Serial output TxD
Receive buffer register
read signal
TBE=0
TSC=0
TBE=1
TBE=0
ST D0
D1
1 start bit
7/8 data bit
1/0 parity bit
1/2 stop bit
Serial input RxD
ST D0 D1
TBE=1
SP ST D0 D1
RBF=1
SP ST
RBF=0
D0 D1
TSC=1 *
SP
V_{Generated at 2nd bit in 2}
stop bit mode
RBF=1
SP
Notes 1 : Error flag detection occurs at the same time that the RBF flag becomes “1” (at 1st stop bit during reception).
2 : The transmit interrupt (TI) can be selected to be generated when either TBE=1 or TSC=1, depending on the setting of
the transmit interrupt source selection bit of the serial I/O control register.
3 : The receive interrupt (RI) is set when the RBF flag becomes “1”.
Fig. 31 Operation of UART serial I/O function
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