7480 Datasheet, PDF (18/98 Pages) Bi technologies – 7/8 Diameter 5-Turn Wirewound Precision Potentiometer

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MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Interrupts
Interrupts are vectored interrupts, and they can be caused by 14
different sources: 5 external sources, 8 internal sources, and 1
software source.
(1) Interrupt Control
All interrupts, except the BRK instruction interrupt, have an inter-
rupt request bit and an interrupt enable bit. Additionally, a global
interrupt disable flag affects them.
When the interrupt enable bit and the interrupt request bit are set
to "1" and the interrupt disable flag is set to "0", an interrupt is ac-
cepted.
The interrupt request bits can be cleared by the program but can-
not be set. The interrupt enable bit can be set and cleared by the
program.
The reset and BRK instruction interrupt can never be disabled.
Other interrupts are disabled when the interrupt disable flag is set.
(2) Interrupt Operation
When an interrupt request is accepted:
1. The contents of the program counter and the processor status
register are automatically pushed into the stack.
2. The interrupt disable flag is set and the interrupt request bit is
cleared.
3. The interrupt jump destination address is read into the program
counter.
s Notes
• When the active edge of an external interrupt (INT0, INT1,
CNTR0, CNTR1) is set, the interrupt request bit may also be set.
Therefore, disable the external interrupt and set the edge polar-
ity selection register. Then clear the interrupt request bit and
accept the external interrupt.
• Input a trigger width over 250 ns to the INT0/INT1 pin.
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