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7480 Datasheet, PDF (32/98 Pages) Bi technologies – 7/8 Diameter 5-Turn Wirewound Precision Potentiometer
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MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Serial I/O
Serial I/O can be used as either clock synchronous or asynchro-
nous (UART) serial I/O. A dedicated timer (baud rate generator) is
also provided for baud rate generation when serial I/O is in opera-
tion.
(1) Clock Synchronous Serial I/O Mode
The clock synchronous serial I/O mode can be selected by setting
the serial I/O mode selection bit of the serial I/O control register
(address 00E216) to “1”.
In the clock synchronous serial I/O, the transmitter-side microcom-
puter and the receiver-side microcomputer must use the same
clock for serial I/O operation. If an internal clock is used as oper-
ating clock, a transfer is started by a write signal to the transmit/
receive buffer register.
Data bus
RXD
SCLK
XIN
SRDY
TXD
P16
P14
Receive
enable bit
(RE)
Serial I/O enable bit
(SIOE)
1/4
SRDY output enable
bit (SRDY)
F/F
Transmit enable
bit (TE)
P17
P15
Address 00E016
Receive buffer register
Receive shift register
Shift clock
Serial I/O control register Address 00E216
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Clock control circuit
Serial I/O synchronous
BRG count source Frequency division
clock selection
selection bit (CSS) ratio 1/(n+1)
bit (SCS)
Baud rate generator
1/4
1/4
Address 00E416
Falling edge
detection
Clock control circuit
Transmit shift register
Transmit interrupt source
selection bit (TIC)
Transmit buffer register
Address 00E016
Transmit shift register shift completion flag (TSC)
Transmit interrupt request (TI)
Transmit buffer empty flag (TBE)
Serial I/O status register Address 00E116
Data bus
Fig. 28 Block diagram of clock synchronous serial I/O
Transmit/receive shift clock,
1/8 – 1/8192 of internal clock, or
external clock
Serial output TxD
D0
D1
D2
D3
D4
D5
D6
D7
Serial input RxD
D0
D1
D2
D3
D4
D5
D6
D7
Receive enable signal SRDY
Write signal to receive/
transmit buffer register
(address 00E016)
TBE = 0 TBE = 1
TSC = 0
RBF = 1
TSC = 1
Overrun error (OE) detection
Notes 1 : The transmit interrupt (TI) can be selected to be generated either when the transmit buffer is empty (TBE = 1) or after the
transmit shift operation is completed (TSC = 1) by using the transmit interrupt source selection bit (TIC) of the serial I/O control
register.
2 : If data is written to the transmit buffer register when TSC = 0, the transmit clock is generated continuously, and serial data is
output continuously from the TxD pin.
3 : The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1”.
Fig. 29 Operation of clock synchronous serial I/O function
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