7480 Datasheet, PDF (24/98 Pages) Bi technologies – 7/8 Diameter 5-Turn Wirewound Precision Potentiometer

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MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
(7) PWM Mode
q Mode Selection
This mode is selected by setting b2, b1 and b0 of TXM or TYM
to “110”.
q Count Source Selection
The count source is f(XIN)/2, f(XIN)/8 or f(XIN)/16.
q Interrupt
At the rising edge of the CNTR0/CNTR1 output, set the timer X
interrupt request bit (b0) or timer Y interrupt request bit (b1) of
IREQ1 to “1”.
q Explanation of Operation
In the case of timer X, the PWM waveform is output from the
CNTR0 pin. In the case of timer Y, the PWM waveform is output
from the CNTR1 pin.
The PWM waveform “H” period is determined by the setting
value n (n=0 to 255) of TXH or TYH. The “L” period is deter-
mined by the setting value m (m=0 to 255) of TXL or TYL.
The PWM cycle is as follows:
PWM cycle = (n + m) ! ts
n
PWM output duty = _{(n + m)}
ts: Timer X/timer Y count source cycle
While a timer operation stops
The timer value is set in TXL, TXH, TYL and TYH by writing to
the timer and timer latch at the same time. The output of the
CNTR0/CNTR1 pin is initialized to “H” by setting this timer value.
While a timer operation is enabled
When b1 and b0 of TXYCON are set to “0”, “H” is output during
the period of the setting value of TXH or TYH. After that, “L” is
output during the period of the setting value of TXL or TYL.
Then, these operations will be repeated. The PWM output sub-
sequent to an underflow can be changed by setting the timer
value in TXL, TXH, TYL, TYH by writing only to the timer latch.
In this mode, set the port in common with the CNTR0/CNTR1
pin as an output port.
s Note
q When the PWM “H” period is set to “0016”, the PWM output is
always “L” level.
q When the PWM “L” period is set to “0016”, the PWM output is al-
ways “H” level.
q When the PWM “H” period is set to “0016” and the “L” period is
set to “0016”, the PWM output is always “L” level.
q When at least one of the PWM “H” period and “L” period is set
to “0016”, a timer X interrupt request/timer Y interrupt request
does not occur.
q When the timer latch is set at “0016”, the timer counts down, so
its value is not constant.
Figure 25 shows a timing diagram in the PWM mode.
s Note on All Modes
q Write Control for Timer X, Timer Y
Timer X and timer Y can select either writing to both timer latch
and timer or writing only to the timer latch by b3 of TXM or TYM.
At writing only to the timer latch, a value is set in the timer latch
by writing the value in the timer X/timer Y address, so the timer
is updated at the next underflow. After reset release, writing to
both the timer latch and timer is selected.
At this status, when a value is written in the timer X/timer Y ad-
dress, the value is set in both the timer and timer latch at the
same time.
At writing only to the timer latch, when the write timing for the
timer latch is almost equal to the underflow timing, the value
that is set in the timer may not be constant.
q Read Control for Timer X/Timer Y
When the pulse cycle measurement mode or pulse width mea-
surement mode is selected, the timer value cannot be read out.
In the other modes, the timer value can be read regardless of
count operation and count stop. However, the timer latch value
cannot be read out.
q Note on CNTR0, CNTR1, INT0, INT1 Interrupt Polarity Selection
When the CNTR0/CNTR1 edge selection bit or INT0/INT1 inter-
rupt edge selection bit is set, this affects the respective interrupt
polarity.
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