H8S-2639 Datasheet, PDF (143/1547 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

3.2.3 Pin Function Control Register (PFCR)
Section 3 MCU Operating Modes
Bit
:
7
6
5
4
3
2
1
0




AE3
AE2
AE1
AE0
Initial value :
0
0
0
0
1/0
1/0
0
1/0
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PFCR is an 8-bit readable-writeable register that performs address output control in on-chip ROM-
enabled expansion mode.
PFCR is initialized to H'0D/H'00 by a reset and in the hardware standby mode.
Bits 7 to 4— Reserved: Only 0 should be written to these bits.
Bits 3 to 0—Address Output Enable 3 to 0 (AE3 to AE0): These bits select enabling or
disabling of address outputs A8 to A23 in on-chip ROM-disabled expansion mode and on-chip
ROM-enabled expansion mode. When a pin is enabled for address output, the address is output
regardless of the corresponding DDR setting. When a pin is disabled for address output, it
becomes an output port when the corresponding DDR bit is set to 1.
Rev. 6.00 Feb 22, 2005 page 83 of 1484
REJ09B0103-0600