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| HYB18TC512160BF Datasheet, PDF (46/61 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM | |||
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Internet Data Sheet
HYB18TC512[16/80]0BF
512-Mbit Double-Data-Rate-Two SDRAM
FIGURE 8
Method for calculating transitions and endpoint
tHZ
tRPST end point
VOH - x mV
VOH - 2x mV
VOL + 2x mV
VOL + x mV
T1 T2
tHZ,tRPST end point = 2*T1-T2
VTT + 2x mV
VTT + x mV
VTT - x mV
VTT - 2x mV
tLZ
tRPRE begin point
T1 T2
tLZ,tRPRE begin point = 2*T1-T2
FIGURE 9
Differential input waveform timing - tDS and tDS
DQS
DQS
tDS tDH
tDS tDH
VDDQ
VIH(ac) min
VIH(dc) min
VREF(dc)
VIL(dc) max
VIL(ac) max
VSS
Rev. 1.11, 2006-09
46
03292006-HDLH-OAY6
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