HYB18TC512160BF Datasheet, PDF (21/61 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM

Internet Data Sheet
HYB18TC512[16/80]0BF
512-Mbit Double-Data-Rate-Two SDRAM
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UH JD GG U
03%7 
Field
BA2
Bits Type¹⁾
16 reg.addr
BA1
15
BA0
14
A
[13:0] w
1) w = write only
TABLE 14
EMR(3) Programming Extended Mode Register Definition (BA[2:0]=010_B)
Description
Bank Address[2]
Note: BA2 is not available on 256Mbit and 512Mbit components
0_B BA2 Bank Address
Bank Adress[1]
1_B BA1 Bank Address
Bank Adress[0]
1_B BA0 Bank Address
Address Bus[13:0]
Note: A13 is not available for 256 Mbit and x16 512 Mbit configuration
0_B A[13:0] Address bits
Input Pin
×8 components
DQ[7:0]
DQS
DQS
RDQS
RDQS
DM
×16 components
DQ[7:0]
DQ[15:8]
LDQS
LDQS
UDQS
UDQS
LDM
UDM
EMRS(1) Address Bit A10
X
X
0
X
0
X
X
X
X
0
X
0
X
X
TABLE 15
ODT Truth Table
EMRS(1) Address Bit A11
X
1
1
0
X
X
Rev. 1.11, 2006-09
21
03292006-HDLH-OAY6