74HC7030 Datasheet, PDF (9/22 Pages) NXP Semiconductors – 9-bit x 64-word FIFO register; 3-state

Philips Semiconductors
9-bit x 64-word FIFO register; 3-state
Product specification
74HC/HCT7030
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
−40 to +85
−40 to +125
UNIT
V_CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t_W
SO pulse width
100 33
HIGH or LOW
20 12
17 10
125
150
25
30
21
26
ns 2.0 Fig.9
4.5
6.0
t_W
DIR pulse width
10 47 145 8
180 8
220 ns 2.0 Fig.7
HIGH
5
17 29 4
36 4
44
4.5
4
14 25 3
31 3
38
6.0
t_W
DOR pulse width
10 47 145 8
180 8
220 ns 2.0 Fig.10
HIGH
5
17 29 4
36 4
44
4.5
4
14 25 3
31 3
38
6.0
t_W
MR pulse width
70 22
90
105
ns 2.0 Fig.8
LOW
14 8
18
21
4.5
12 6
15
18
6.0
t_rem
removal time
MR to SI
80 24
16 8
14 7
100
120
20
24
17
20
ns 2.0 Fig.15
4.5
6.0
t_su
set-up time
D_n to SI
t_h
hold time
D_n to SI
−35 −36
−7 −13
−6 −10
135 44
27 16
23 13
−45
−55
−9
−11
−8
−9
170
205
34
41
29
35
ns 2.0 Fig.13
4.5
6.0
ns 2.0 Fig.13
4.5
6.0
f_max
maximum clock pulse
9.9
2.8
2.4
frequency
30
14
12
SI, SO burst mode
36
16
14
MHz 2.0
4.5
6.0
Figs 11 and 12
f_max
maximum clock pulse
9.9
2.8
2.4
frequency
30
14
12
SI, SO using flags
36
16
14
MHz 2.0
4.5
6.0
Figs 6 and 9
f_max
maximum clock pulse
7.6
2.2
1.8
frequency
23
11
9.2
SI, SO cascaded
27
13
11
MHz 2.0
4.5
6.0
Figs 6 and 9
December 1990
9