74HC7030 Datasheet, PDF (8/22 Pages) NXP Semiconductors – 9-bit x 64-word FIFO register; 3-state

Philips Semiconductors
9-bit x 64-word FIFO register; 3-state
Product specification
74HC/HCT7030
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I_CC category: LSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
−40 to +85
−40 to +125
UNIT
V_CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t_PHL/ t_PLH propagation delay
MR to DIR, DOR
t_PHL/ t_PLH propagation delay
SI to DIR
69 210
265
315 ns 2.0 Fig.8
25 42
53
63
4.5
20 36
45
54
6.0
77 235
295
355 ns 2.0 Fig.6
28 47
59
71
4.5
22 40
50
60
6.0
t_PHL/ t_PLH propagation delay
SO to DOR
102 315
395
475 ns 2.0 Fig.9
37 63
79
95
4.5
30 54
67
81
6.0
t_PHL/ t_PLH propagation delay
DOR to Q_n
11 35
45
47
9
36
8
t_PHL/ t_PLH propagation delay
SO to Q_n
113 345
430
41 69
86
33 59
73
t_PLH
propagation delay/
2.5 8.0
10
ripple through delay
0.9 1.6
2.0
SI to DOR
0.7 1.3
1.6
t_PLH
propagation delay/
bubble-up delay
SO to DIR
3.3 10.0
12
1.2 2.0
2.5
1.0 1.6
2.0
t_PZH/ t_PZL 3-state output enable
52 175
220
OE to Q_n
19 35
44
15 30
37
55 ns
11
9
520 ns
104
88
12 µs
2.4
1.9
15 µs
3.0
2.4
265 ns
53
45
2.0 Fig.10
4.5
6.0
2.0 Fig.14
4.5
6.0
2.0 Fig.10
4.5
6.0
2.0 Fig.7
4.5
6.0
2.0 Fig.16
4.5
6.0
t_PHZ/ t_PLZ 3-state output disable
50 150
190
225 ns 2.0 Fig.16
OE to Q_n
18 30
38
45
4.5
14 26
33
38
6.0
t_THL/ t_TLH output transition time
19 75
7 15
6 13
t_W
SI pulse width
50 14
HIGH or LOW
10 5
94
95
19
16
65
75
13
15
11
13
110 ns
22
19
ns
2.0 Fig.14
4.5
6.0
2.0 Fig.6
4.5
6.0
December 1990
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