74HC7030 Datasheet, PDF (10/22 Pages) NXP Semiconductors – 9-bit x 64-word FIFO register; 3-state

Philips Semiconductors
9-bit x 64-word FIFO register; 3-state
Product specification
74HC/HCT7030
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I_CC category: LSI
Note to HCT types
The value of additional quiescent supply current (∆I_CC) for a unit load of 1 is given in the family specifications.
To determine ∆I_CC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT
OE
1.00
SI
1.50
D_n
0.75
MR
1.50
SO
1.50
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HCT
+25
−40 to +85
−40 to +125
UNIT
V_CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t_PHL/ t_PLH propagation delay
MR to DIR, DOR
30 51
53
63 ns 4.5 Fig.8
t_PHL/ t_PLH propagation delay
SI to DIR
29 49
61
74 ns 4.5 Fig.6
t_PHL/ t_PLH propagation delay
SO to DOR
39 67
84
101 ns 4.5 Fig.9
t_PHL/ t_PLH propagation delay
SO to Q_n
46 78
98
t_PHL/ t_PLH propagation delay
DOR to Q_n
7 12
15
t_PLH
propagation delay/ripple
0.9 1.6
2.0
through delay
SI to DOR
t_PLH
propagation delay/
bubble-up delay
SO to DIR
1.2 2.0
2.5
t_PZH/ t_PZL 3-state output enable
OE to Q_n
20 35
44
t_PHZ/ t_PLZ 3-state output disable
OE to Q_n
19 35
44
t_THL/ t_TLH output transition time
7 15
19
117 ns 4.5 Fig.14
18 ns 4.5 Fig.10
2.4 µs 4.5 Fig.10
3.0 µs 4.5 Fig.7
53 ns 4.5 Fig.16
53 ns 4.5 Fig.16
22 ns 4.5 Fig.14
December 1990
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