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74HC7030 Datasheet, PDF (3/22 Pages) NXP Semiconductors – 9-bit x 64-word FIFO register; 3-state | |||
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Philips Semiconductors
9-bit x 64-word FIFO register; 3-state
Product speciï¬cation
74HC/HCT7030
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/ tPLH
fmax
CI
CP
propagation delay
MR to DIR and DOR
SO to Qn
maximum clock frequency
SI and SO
input capacitance
power dissipation capacitance per package
CL = 15 pF; VCC = 5 V
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD Ã VCC2 Ã fi + â (CL Ã VCC2 Ã fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
â (CL Ã VCC2 Ã fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC â 1.5 V
ORDERING INFORMATION
See â74HC/HCT/HCU/HCMOS Logic Package Informationâ.
TYPICAL
UNIT
HC HCT
21
26
ns
36
40
ns
33
29
MHz
3.5 3.5 pF
660 660 pF
December 1990
3
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