PLC18V8Z Datasheet, PDF(7/23 Page) NXP Semiconductors – Zero standby power CMOS versatile PAL devices

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PLC18V8Z Datasheet, PDF (7/23 Pages) NXP Semiconductors – Zero standby power CMOS versatile PAL devices

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Philips Semiconductors

Zero standby power

CMOS versatile PAL devices

Product specification

PLC18V8Z

CONFIGURATION CELL

A single configuration cell controls the functions of Pins 1 and 11.

Refer to Functional Diagram. When the configuration cell is

programmed, Pin 1 is a dedicated clock and Pin 11 is dedicated for

output enable. When the configuration cell is unprogrammed, Pins 1

and 11 are both dedicated inputs. Note that the output enable for all

registered OMCs is commonâfrom Pin 11 only. Output enable

control of the bidirectional I/O OMCs is provided from the AND array

via the direction product term.

If any one OMC is configured as registered, the configuration cell

will be automatically configured (via the design software) to ensure

that the clock and output enable functions are enabled on Pins 1

and 11, respectively. If none of the OMCs are registered, the

configuration cell will be programmed such that Pins 1 and 11 are

dedicated inputs. The programming codes are as follows:

Pin 1 = CLK, Pin 11 = OE

Pin 1 and Pin 11 = Input

FUNCTION

Registered mode

CONTROL CELL CONFIGURATIONS

AC11

AC2N

CONFIG. CELL

Programmed

Bidirectional I/O mode1

Unprogrammed

Fixed input mode

Unprogrammed

Programmed

Fixed output mode

Programmed

Unprogrammed

NOTE:

1. This is the virgin state as shipped from the factory.

Unprogrammed

COMMENTS

Dedicated clock from Pin 1. OE Control

for all registerd OMCs from Pin 11 only.

Pins 1 and 11 are dedicated inputs.

3-State control from AND array only.

Pins 1 and 11 are dedicated inputs.

Pins 1 and 11 are dedicated inputs. The

feedback path (via FMUX) is disabled.

ARCHITECTURE CONTROLâAC1 and AC2

11 OE

DIR

F(D), F (D)

F(B), F (B)

F(O), F (O)

CLK

OMC CONFIGURATION

REGISTERED (DâTYPE)

CODE

OMC CONFIGURATION

BIDIRECTIONAL I/O1

(COMBINATORIAL)

CODE

OMC CONFIGURATION

FIXED OUTPUT

CODE

CLK Q

F (I)

F(D), F (D)

NC CLK Q

NC OE

OMC CONFIGURATION

FIXED INPUT

CODE

CONFIGURATION CELL

PIN 1 = CLK

PIN 11 = OE

CODE

CONFIGURATION CELL

PIN 1 = INPUT

PIN 11 = INPUT

NOTES:

A factory shipped unprogrammed device is configured such that:

1. This is the initial unprogrammed state. All cells are in a conductive state.

2. All AND gates are pulled to a logic â0â (Low).

3. Output polarity is inverting.

4. Pins 1 and 11 are configured as inputs 0 and 9. The clock and OE functions are disabled.

5. All Output Macro Cells (OMCs) are configured as bidirectional I/O, with the outputs disabled via the direction term.

6. This configuration cannot be used if any OMCs are configured as registered (Code = D).

CODE

SP00015

1997 Aug 08

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