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PLC18V8Z Datasheet, PDF (14/23 Pages) NXP Semiconductors – Zero standby power CMOS versatile PAL devices | |||
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Philips Semiconductors
Zero standby power
CMOS versatile PAL devices
Product specification
PLC18V8Z
REGISTER PRELOAD FUNCTION
(DIAGNOSTIC MODE ONLY)
In order to facilitate the testing of state machine/controller designs, a
diagnostic mode register preload feature has been incorporated into
the PLC18V8Z series device. This feature enables the user to load
the registers with predetermined states while a super voltage is
applied to Pins 11 and 6 (I9/OE and I5). (See diagram for timing and
sequence.)
To read the data out, Pins 11 and 6 must be returned to normal TTL
levels. The outputs, F0 â F7, must be enabled in order to read data
out. The Q outputs of the registers will reflect data in as input via
F0 â F7 during preload. Subsequently, the register Q output via the
feedback path will reflect the data in as input via F0 â F7.
Refer to the voltage waveform for timing and voltage references.
tPL = 10µsec.
REGISTER PRELOAD (DIAGNOSTIC MODE)
I9/OE
(PIN 11)
I5
(PIN 6)
5.0V
12.0V
tPL tPL
tPL
12.0V
12.0V
tPL tPL
5.0V
tPL
5.0V
I0/CLK
(PIN 1)
tOE
tCKL tCKO
F0â7
PRELOAD DATA IN
PRELOAD DATA OUT
I1â4,6â8ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ tIS tIH
DATA OUT
OE(VOL)
I0/CLK
F0â7
I1â4, 6â8
SP00022
1997 Aug 08
14
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