PLC18V8Z Datasheet, PDF (4/23 Pages) NXP Semiconductors – Zero standby power CMOS versatile PAL devices

Philips Semiconductors
Zero standby power
CMOS versatile PAL devices
Product specification
PLC18V8Z
PAL DEVICE TO PLC18V8Z OUTPUT PIN CONFIGURATION CROSS REFERENCE
PIN
NO.
PLC
18V8Z
16L8
16H8
16P8
16P8
16R4
16RP4
16R6
16RP6
16R8
16RP8
16L2
16H2
16P2
14L4
14H4
14P4
1
I₀/CLK
I
CLK
CLK
CLK
I
I
19
F7
B
B
B
D
I
I
18
F6
B
B
D
D
I
I
17
F5
B
D
D
D
I
O
16
F4
B
D
D
D
O
O
15
F3
B
D
D
D
O
O
14
F2
B
D
D
D
I
O
13
F1
B
B
D
D
I
I
12
F0
B
B
B
D
I
I
11
I₉/OE
I
OE
OE
OE
I
I
12L6
12H6
12P6
I
I
O
O
O
O
O
O
I
I
The Philips Semiconductors’ state-of-the-art Floating-Gate CMOS
EPROM process yields bipolar equivalent performance at less than
one-quarter the power consumption. The erasable nature of the
EPROM process enables Philips Semiconductors to functionally test
the devices prior to shipment to the customer. Additionally, this
allows Philips Semiconductors to extensively stress test, as well as
ensure the threshold voltage of each individual EPROM cell. 100%
programming yield is subsequently guaranteed.
FUNCTIONAL DIAGRAM
I₀/
CLK
I₀
CONFIG.
CELL
9
I₁
OMC
F₇
CLK
9
I₂
OMC
F₆
9
I₇
OMC
F₁
9
I₈
OMC
F₀
SP
CONFIG.
AR _{OE CELL} I₉/OE
I₉
SP00013
10L8
10H8
10P8
I
O
O
O
O
O
O
O
O
I
1997 Aug 08
4