TDA4855 Datasheet, PDF (5/44 Pages) NXP Semiconductors – Autosync Deflection Controller ASDC

Philips Semiconductors
Autosync Deflection Controller (ASDC)
Preliminary specification
TDA4855
PINNING
SYMBOL PIN
DESCRIPTION
HFLB
1 horizontal flyback input
XRAY
2 X-ray protection input
BOP
3 B+ control OTA output;
comparator input
BSENS 4 B+ control comparator input/output
BIN
5 B+ control OTA input
BDRV
6 B+ control driver output
HDRV
7 horizontal driver output
PGND
8 power ground
V_CC
FOCUS
9 supply voltage
10 horizontal focus parabola input/output
EWDRV 11 EW parabola output
VOUT2 12 vertical output 2 (ascending sawtooth)
VOUT1
13 vertical output 1 (descending
sawtooth)
VSYNC
14 vertical synchronization input/output
(TTL level)
HSYNC 15 horizontal/composite synchronization
input (TTL level or sync-on-video)
CLBL
16 video clamping pulse/vertical blanking
and protection output
VPOS
17 vertical shift input
VAMP
18 vertical size input
VSCOR 19 vertical S-correction input
EWTRP 20 EW trapezium correction input
EWPAR 21 EW parabola amplitude input
VAGC
22 external capacitor for vertical
amplitude control
VREF
23 external resistor for vertical oscillator
VCAP
24 external capacitor for vertical oscillator
SGND
25 signal ground
HPLL1 26 external filter for PLL1
HBUF
27 buffered f/v voltage output
HREF
28 reference current for horizontal
oscillator
HCAP
29 external capacitor for horizontal
oscillator
HPOS
30 horizontal shift input
HPLL2 31 external filter for PLL2/soft start
EWWID 32 horizontal size input
handbook, halfpage
HFLB 1
32 EWWID
XRAY 2
31 HPLL2
BOP 3
30 HPOS
BSENS 4
29 HCAP
BIN 5
28 HREF
BDRV 6
27 HBUF
HDRV 7
26 HPLL1
PGND 8
VCC 9
25 SGND
TDA4855
24 VCAP
FOCUS 10
23 VREF
EWDRV 11
22 VAGC
VOUT2 12
21 EWPAR
VOUT1 13
20 EWTRP
VSYNC 14
19 VSCOR
HSYNC 15
18 VAMP
CLBL 16
17 VPOS
MBG549
Fig.2 Pin configuration.
1996 Jul 18
5