TDA4855 Datasheet, PDF (25/44 Pages) NXP Semiconductors – Autosync Deflection Controller ASDC

Philips Semiconductors
Autosync Deflection Controller (ASDC)
Preliminary specification
TDA4855
handbook, full pagewidth
vertical oscillator sawtooth
at VCAP (pin 24)
vertical sync pulse
internal trigger
inhibit window
(typical 6.7 ms)
vertical blanking pulse
at CLBL (pin 16)
differential output currents
VOUT1 (pin 13) and
VOUT2 (pin 12)
EW drive waveform
at EWDRV (pin 11)
4.0 V automatic trigger level
3.8 V synchronized trigger level
1.4 V
inhibited
IVOUT1
IVOUT2
tip-parabola
EW parabola 3 V (p-p) maximum
DC shift 4 V maximum
7.0 V maximum
LOW level 1.2 V fixed
MBG597
1996 Jul 18
Fig.10 Pulse diagram for vertical part.
25