TDA4855 Datasheet, PDF (30/44 Pages) NXP Semiconductors – Autosync Deflection Controller ASDC

Philips Semiconductors
Autosync Deflection Controller (ASDC)
PLL2 soft start sequence
Preliminary specification
TDA4855
handbook, full pagewidth
VHPLL2
MBG553
4.4 V continuous blanking off
PLL2 enabled
frequency detector enabled
duty ^{factor increases}
3.7 V HDRV duty factor has reached nominal value
BDRV enabled
VOUT1 and VOUT2 enabled
0.5 V HDRV duty factor begins to increase
time
a. PLL2 start-up sequence.
handbook, full pagewidth
VHPLL2
1996 Jul 18
MBG552
4.4 V continuous blanking CLBL (pin 16) activated
PLL2 disabled
frequency detector disabled
3.7 V
duty _{factor decreases}
HDRV duty factor begins to decrease
BDRV floating
VOUT1 and VOUT2 floating
0.5 V HDRV floating
time
b. PLL2 shut-down sequence.
Fig.15 PLL2 soft start sequence.
30