TDA4855 Datasheet, PDF (29/44 Pages) NXP Semiconductors – Autosync Deflection Controller ASDC

Philips Semiconductors
Autosync Deflection Controller (ASDC)
Preliminary specification
TDA4855
Start-up and shut-down sequence
handbook, full pagewidth
VCC
MBG555
8.5 V continuous blanking off
PLL2 enabled
frequency detector enabled
VCC > 8.5 V
and
VHPLL2 > 4.4 V
8.2 V video clamping pulse enabled
BDRV enabled
VOUT1 and VOUT2 enabled
VCC > 8.2 V
and
VHPLL2 > 3.7 V
5.8 V PLL2 soft start sequence begins⁽¹⁾
4.0 V continuous blanking CLBL (pin 16) activated
time
(1) See Fig.15 for PLL2 soft-start.
a. Start-up sequence.
handbook, full pagewidth
VCC
MBG554
8.5 V continuous blanking CLBL (pin 16) activated
PLL2 disabled
frequency detector disabled
8.0 V video clamping pulse disabled
BDRV floating
VOUT1 and VOUT2 floating
5.6 V HDRV floating
4.0 V continuous blanking disappears
time
b. Shut-down sequence.
1996 Jul 18
Fig.14 Start-up sequence and shut-down sequence.
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