74F841 Datasheet, PDF (3/18 Pages) NXP Semiconductors – Bus interface latches

Philips Semiconductors
Bus interface latches
PIN CONFIGURATION for 74F841
OE ¹
D0 ²
D1 ³
D2 ⁴
D3 ⁵
D4 ⁶
D5 ⁷
D6 ⁸
D7 ⁹
D8 ¹⁰
D9 ¹¹
GND 12
24 V_CC
23 _Q0
22 _Q1
21 _Q2
20 _Q3
19 _Q4
18 _Q5
17 _Q6
16 _Q7
15 _Q8
14 _Q9
13 _LE
SF01279
LOGIC SYMBOL for 74F841
2 3 4 5 6 7 8 9 10 11
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9
13
LE
1
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9
V_CC = Pin 24
GND = Pin 12
23 22 21 20 19 18 17 16 15 14
SF01280
LOGIC SYMBOL (IEEE/IEC) for 74F841
1
EN
13
C1
2
1D
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
SF01281
Product specification
74F841/74F842/74F843/
74F845/74F846
PIN CONFIGURATION for 74F842
OE ¹
D0 ²
D1 ³
D2 ⁴
D3 ⁵
D4 ⁶
D5 ⁷
D6 ⁸
D7 ⁹
D8 ¹⁰
D9 ¹¹
GND 12
24 V_CC
23 _Q0
22 _Q1
21 _Q2
20 _Q3
19 _Q4
18 _Q5
17 _Q6
16 _Q7
15 _Q8
14 _Q9
13 _LE
SF01282
LOGIC SYMBOL for 74F842
2 3 4 5 6 7 8 9 10 11
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9
13
LE
1
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9
V_CC = Pin 24
GND = Pin 12
23 22 21 20 19 18 17 16 15 14
SF01283
LOGIC SYMBOL (IEEE/IEC) for 74F842
1
EN
13
C1
2
23
1D
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
SF01284
1999 Jun 23
3