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74F841 Datasheet, PDF (10/18 Pages) NXP Semiconductors – Bus interface latches
Philips Semiconductors
Bus interface latches
Product specification
74F841/74F842/74F843/
74F845/74F846
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted.
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
MIN TYP2 MAX
UNIT
VOH
VOL
VIK
II
IIH
IIL
IOZH
High-level output voltage
±10%VCC 2.2
V
VCC = MIN,
IOH = –15mA ±5%VCC
2.2
3.3
V
VIL = MAX, VIH = MIN
±10%VCC 2.0
V
IOH = –24mA
±5%VCC 2.0
V
Low-level output voltage
VCC = MIN,
VIL = MAX, VIH = MIN
IOL = 32mA
IOL = 48mA
±10%VCC
±5%VCC
0.38 0.55 V
0.38 0.55 V
Input clamp voltage
VCC = MIN, II = IIK
–0.73 –1.2 V
Input current at maximum input voltage
VCC = 0.0V, VI = 7.0V
100 µA
High-level input current
VCC = MAX, VI = 2.7V
20
µA
Low-level input current
VCC = MAX, VI = 0.5V
–20 µA
Off-state output current,
High-level voltage applied
VCC = MAX, VO = 2.7V
50
µA
IOZL
Off-state output current,
Low-level voltage applied
VCC = MAX, VO = 0.5V
–50 µA
IOS
Short-circuit output current3
VCC = MAX
–100
–225 mA
ICCH
50
65
mA
74F841 ICCL
VCC = MAX
60
80
mA
ICCZ
70
92
mA
ICCH
40
60
mA
74F842 ICCL
VCC = MAX
65
90
mA
ICC
Supply current
(total)
ICCZ
ICCH
74F843
74F845
ICCL
ICCZ
VCC = MAX
60
90
mA
65
90
mA
75 100 mA
85 115 mA
ICCH
50
70
mA
74F846 ICCL
VCC = MAX
70
95
mA
ICCZ
70
95
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter test, IOS tests should be performed last.
1999 Jun 23
10