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74F841 Datasheet, PDF (12/18 Pages) NXP Semiconductors – Bus interface latches
Philips Semiconductors
Bus interface latches
Product specification
74F841/74F842/74F843/
74F845/74F846
AC ELECTRICAL CHARACTERISTICS for 74F843/74F845
SYMBOL
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation delay
Dn to Qn
Propagation delay
LE to Qn
Propagation delay
PRE to Qn
Propagation delay
MR to Qn
Output enable time
High or Low-level OEn to Qn
Output disable time
High or Low-level OEn to Qn
TEST
CONDITION
Waveform 1, 2
Waveform 1, 2
Waveform 3
Waveform 3
Waveform 5
Waveform 6
Waveform 5
Waveform 6
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
MIN TYP MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN
MAX
2.0
4.5
7.5
2.0
8.5
2.5
4.5
8.0
2.5
8.5
4.5
6.5
9.5
4.5
10.0
4.0
6.0
8.5
4.0
8.5
UNIT
ns
ns
3.5
5.5
8.5
3.0
9.0
ns
2.0
4.5
7.5
2.0
2.5
4.5
7.5
2.0
4.0
6.0
9.5
3.0
1.0
4.5
8.0
1.0
1.0
5.0
8.0
1.0
8.0
ns
8.0
10.5
ns
8.5
8.5
ns
AC SETUP REQUIREMENTS for 74F843/74F845
SYMBOL
PARAMETER
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
tw(H)
tREC
tREC
Setup time, High or Low
Dn to LE
Hold time, High or Low
Dn to LE
LE pulse width, High
PRE pulse width, Low
MR pulse width, Low
PRE recovery time
MR recovery time
TEST
CONDITION
Waveform 4
Waveform 4
Waveform 4
Waveform 3
Waveform 3
Waveform 3
Waveform 3
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
MIN
TYP
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN
MAX
1.0
0.0
1.0
0.0
3.0
3.0
4.0
4.0
3.0
3.0
4.0
5.0
4.0
5.0
0.0
0.0
3.5
4.5
UNIT
ns
ns
ns
ns
ns
ns
ns
1999 Jun 23
12