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74F841 Datasheet, PDF (11/18 Pages) NXP Semiconductors – Bus interface latches
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Philips Semiconductors
Bus interface latches
Product specification
74F841/74F842/74F843/
74F845/74F846
AC ELECTRICAL CHARACTERISTICS for 74F841/74F842
SYMBOL
PARAMETER
TEST
CONDITION
tPLH
Propagation delay
tPHL
Dn to Qn
tPLH
Propagation delay
tPHL
LE to Qn
74F841
Waveform 1, 2
Waveform 1, 2
tPLH
Propagation delay
tPHL
Dn to Qn
tPLH
Propagation delay
tPHL
LE to Qn
74F842
Waveform 1, 2
Waveform 1, 2
tPZH
Output enable time
tPZL
High or Low-level OEn to Qn or Qn
Waveform 5
Waveform 6
tPHZ
Output disable time
tPLZ
High or Low-level OEn to Qn or Qn
Waveform 5
Waveform 6
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
MIN TYP MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN
MAX
2.0
4.0
7.5
2.0
8.0
2.5
4.5
7.5
2.5
8.0
4.5
6.5
9.5
4.0
10.0
4.0
6.0
9.0
3.5
9.5
3.5
5.5
8.5
4.5
9.0
3.0
5.0
8.0
4.0
8.5
5.0 7.0 10.0
3.0
10.5
4.5
6.5
9.0
3.0
9.5
2.5
4.5
8.0
2.0
8.5
4.0
6.0
9.5
3.0
10.5
1.0
4.5
8.0
1.0
8.5
1.0
5.0
8.0
1.0
8.5
UNIT
ns
ns
ns
ns
ns
ns
AC SETUP REQUIREMENTS for 74F841/74F842
SYMBOL
PARAMETER
TEST
CONDITION
ts(H)
ts(L)
th(H)
th(L)
tw(H)
th(H)
th(L)
tw(H)
Setup time, High or Low
Dn to LE
Hold time, High or Low
Dn to LE
LE pulse width, High
Hold time, High or Low
Dn to LE
LE pulse width, High
74F841
74F842
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 4
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
MIN
TYP
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN
MAX
0.0
1.0
0.0
1.0
2.5
3.0
3.0
4.0
3.5
4.0
3.0
3.5
3.5
4.5
3.0
3.0
UNIT
ns
ns
ns
ns
ns
1999 Jun 23
11
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