TDA8007B Datasheet, PDF (29/36 Pages) NXP Semiconductors – Double multiprotocol IC card interface

Philips Semiconductors
Double multiprotocol IC card interface
Product specification
TDA8007B
SYMBOL
PARAMETER
CONDITIONS
MIN.
Timing for multiplexed bus; see Fig.4
t_XTAL1
t_W(ALE)
t_AVLL
period on XTAL1
ALE pulse width
address valid to ALE LOW
t_{(AL−RWL)}
ALE LOW to RD or
WR LOW
t_W(RD)
RD pulse width for URR
pulse width for other
registers
t_(RL−DV)
t_{(RWH−AH)}
RD LOW to data out valid
RD or WR HIGH to
ALE HIGH
t_W(WR)
WR pulse width
t_(DV−WL)
data in valid to WR LOW
Timing for non-multiplexed bus; see Fig.5
50
20
10
10
2t_XTAL1
10
−
10
10
10
t_{(REH−CL)}
t_{(CEL−DV)}
t_{(CEH−DZ)}
t_(AD−DV)
t_{(RL−CEL)}
t_{(CREL−DZ)}
t_(DV−WL)
RD or EN HIGH to CS LOW
10
CS and EN LOW to data out when reading from URR; t_{(CEL−DV)} −
valid
is minimum 2t_XTAL1
CS and EN HIGH to data
−
high-impedance
addresses stable to data out
−
valid
R/W LOW to CS or EN LOW
10
CS and R/W and EN LOW
−
to data in high-impedance
DATA valid to WR LOW
10
TYP. MAX.
−
−
−
−
−
−
−
−
−
−
−
−
−
50
−
−
−
−
−
−
−
−
−
50
−
10
−
10
−
−
−
−
−
−
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2000 Nov 09
29