TDA8007B Datasheet, PDF(12/36 Page) NXP Semiconductors – Double multiprotocol IC card interface

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TDA8007B Datasheet, PDF (12/36 Pages) NXP Semiconductors – Double multiprotocol IC card interface

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Philips Semiconductors

Double multiprotocol IC card interface

Product speciï¬cation

TDA8007B

Table 5 Time-out register 3 (write only); address: B (all bits are cleared after reset)

TO37

TOL23

TO36

TOL22

TO35

TOL21

TO34

TOL20

TO33

TOL19

TO32

TOL18

TO31

TOL17

TO30

TOL16

Table 6 Time-out conï¬guration register (read and write); address: 8 (all bits are cleared after reset)

TOC7

TOC6

TOC5

TOC4

TOC3

TOC2

TOC1

TOC0

Table 7 Time-out counter conï¬gurations

TOC

OPERATING MODE

all counters are stopped

Counter 1 is stopped, and counters 3 and 2 form a 16-bit counter. Counting the value stored in TOR3

and TOR2 is started after 61 is written in the TOC. An interrupt is given, and bit TO3 is set within the

USR when the terminal count is reached. The counter is stopped by writing 00 in the TOC.

Counter 1 is an 8-bit auto reload counter, and counters 3 and 2 form a 16-bit counter. Counter 1 starts

counting the content of TOR1 on the ï¬rst start bit (reception or transmission) detected on I/O after 65 is

written in the TOC. When counter 1 reaches its terminal count, an interrupt is given, bit TO1 in the USR

is set, and the counter automatically restarts the same count until it is stopped. It is not allowed to

change the content of TOR1 during a count. In this mode, the accuracy of counter 1 is Â±0.5 ETU.

Counters 3 and 2 are wired as a single 16-bit counter and starts counting the value TOR3 and TOR2

when 65 is written in the TOC. When the counter reaches its terminal count, an interrupt is given and

bit TO3 is set within the USR. Both counters are stopped when 00 is written in the TOC.

Counters 3, 2 and 1 are wired as a single 24-bit counter. Counting the value stored in TOR3, TOR2 and

TOR1 is started after 68 is written in the TOC. The counter is stopped by writing 00 in the TOC. It is not

allowed to change the content of TOR3, TOR2 and TOR1 within a count.

Counters 3, 2 and 1 are wired as a single 24-bit counter. Counting the value stored in TOR3, TOR2 and

TOR1 on the ï¬rst start bit detected on I/O (reception or transmission) after the value has been written.

It is possible to change the content of TOR3, TOR2 and TOR1 during a count; the current count will not

be affected and the new count value will be taken into account at the next start bit. The counter is

stopped by writing 00 in the TOC. In this conï¬guration TOR3, TOR2 and TOR1 must not be all zero.

Same conï¬guration as TOC = 65, except that counter 1 will be stopped at the end of the 12th ETU

following the ï¬rst start bit detected after E5 has been written in the TOC.

2000 Nov 09

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