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TDA8007B Datasheet, PDF (21/36 Pages) NXP Semiconductors – Double multiprotocol IC card interface
Philips Semiconductors
Double multiprotocol IC card interface
Product specification
TDA8007B
Step-up converter
Except for the VCC generator and the other cards contacts
buffers, the whole circuit is powered by VDD, and VDDA.
If the supply voltage is 2.5 V, then a higher voltage is
needed for the ISO contacts supply. When a card session
is requested by the microcontroller, the sequencer first
enables the step-up converter (a switched capacitors type)
which is clocked by an internal oscillator at a frequency of
approximately 2.5 MHz.
Suppose that VCC is the maximum of VCC1 and VCC2, then
there are four possible situations:
1. VDD = 3 V and VCC = 3 V: in this case the step-up
converter acts as a doubler with a regulation of
approximately 4.0 V.
2. VDD = 3 V and VCC = 5 V: in this case the step-up
converter acts as a tripler with a regulation of
approximately 5.5 V.
3. VDD = 5 V and VCC = 3 V: in this case the step-up
converter acts as a follower: VDD is applied to VUP.
4. VDD = 5 V and VCC = 5 V: in this case the step-up
converter acts as a doubler with a regulation of
approximately 5.5 V.
The recognition of the supply voltage is done by the
TDA8007B at approximately 3.5 V.
The output voltage VUP is fed to the VCC generators. VCC
and GND are used as a reference for all other card
contacts.
ISO 7816 security
The correct sequence during activation and deactivation of
the cards is ensured by two specific sequencers, clocked
by a division ratio of the internal oscillator.
Activation (START bit HIGH in PCR1 or PCR2) is only
possible if the card is present (PRES active HIGH with an
internal current source to GND) and if the supply voltage is
correct (supervisor not active).
The presence of the cards is signalled to the
microcontroller by the Hardware Status Register (HSR).
Bits PR1 or PR2 (in the USR) are set if card 1 or card 2 is
present. PRL1 or PRL2 are set if PR1 or PR2 has toggled.
During a session, the sequencer performs an automatic
emergency deactivation on one card in the event of card
take-off, or short-circuit. Both cards are automatically
deactivated in the event of a supply voltage drop, or
overheating. The hardware status register is updated and
the INT line falls, so that the system microcontroller is
aware of what happened.
Activation sequence
When the cards are inactive, VCC, CLK, RST, C4, C8
and I/O are LOW, with low-impedance with respect to
GND. The step-up converter is stopped.
When everything is satisfactory (voltage supply, card
present and no hardware problems), the system
microcontroller may initiate an activation sequence on a
present card.
After selecting the card and leaving the UART reset mode,
and then configuring the necessary parameters for the
counters and the UART, the START bit can be set within
the PCR (t0) (see Fig.8):
• The step-up converter is started (t1); if one card was
already active, then the step-up converter was already
on and nothing more occurs at this step
• VCC starts rising (t2) from 0 to 5 V or 3 V with a
controlled rise time of 0.17 V/µs (typ.)
• I/O rises to VCC (t3); C4 and C8 also rise if bits
C4 and C8 within the PCR have been set to logic 1
(integrated 10 kΩ pull-up resistors to VCC)
• The CLK is sent to the card and RST is enabled (t4).
After a number of CLK pulses that can be counted with the
time-out counter, bit RSTIN may be set by software: RST
will then rise to VCC.
The sequencer is clocked by 1⁄64fint which leads to a time
interval of t = 25 µs (typ.). Thus t1 = 0 to 1⁄64t, t2 = t1 + 3⁄2t,
t3 = t1 + 7⁄2t and t4 = t1 + 4t.
Deactivation sequence
When the session is completed, the microcontroller resets
START HIGH (t10). The circuit then executes an automatic
deactivation sequence (see Fig.9):
• The card is reset (RST falls LOW) (t11)
• The CLK is stopped (t12)
• I/O, C4 and C8 fall to 0 V (t13)
• VCC falls to 0 V with typical 0.17 V/µs slew rate (t14)
• The step-up converter is stopped and CLK, RST, VCC
and I/O become low-impedance to GND (t15) (if both
cards are inactive).
t11 = t10 + 1⁄64t, t12 = t11 + 1⁄2t, t13 = t11 + t, t14 = t11 + 3⁄2t
and t15 = t11 + 7⁄2t.
tde = time that VCC needs to decrease to less than 0.4 V.
2000 Nov 09
21