SAA7380 Datasheet, PDF (26/60 Pages) NXP Semiconductors – Error correction and host interface IC for CD-ROM ELM

Philips Semiconductors
Error correction and host interface IC for
CD-ROM (ELM)
Preliminary specification
SAA7380
handbook, full pagewidth _SYN
SCL
SDA
(from sub-CPU)
SYN
SCL
SDA
(from sub-CPU)
SDA
(from ELM)
0 1234 567
0 1234 567
READ/WRITE = 0
0 1234 567
0 1234 567
READ/WRITE = 1
MGE191
Fig.3 Sub-CPU interface R/W timing diagram.
7.9 Host registers
7.9.1 SANYO COMPATIBILITY MODE
Table 25 Sanyo compatibility mode
HEN
0
0
0
0
1
CMD
0
0
1
1
X
HRD
1
0
1
0
X
Note
1. Where X = don’t care.
HWR
0
1
0
1
X
write COMIN
read SBOUT
write data
read data
none (note 1)
OPERATION
7.9.1.1 COMIN
This is a 12-byte FIFO used for sending commands from
the host to the sub-CPU. When the host writes to the
COMIN register a sub-CPU CMDI interrupt is generated to
indicate there are bytes in the COMIN FIFO. This is
cleared when the sub-CPU empties the FIFO. If the host
writes to the register when the FIFO is full then the
command is ignored.
If the host writes to this register when the CMDBK bit in the
IFCTRL register is asserted then this will terminate any
data or status byte transfers that are in progress.
7.9.1.2 SBOUT
This is a 12 byte FIFO used to transfer status bytes from
the sub-CPU to the host. The host should only access this
register when the STEN pin is LOW indicating that there
are status bytes available.
1996 Apr 25
26