SAA7380 Datasheet, PDF (20/60 Pages) NXP Semiconductors – Error correction and host interface IC for CD-ROM ELM

Philips Semiconductors
Error correction and host interface IC for
CD-ROM (ELM)
Preliminary specification
SAA7380
Table 14 RMOD bits
RMOD3
0
0
0
0
0
0
0
0
1
RMOD2
0
0
0
0
1
1
1
1
X
Note
1. Where X = don’t care.
RMOD1
0
0
1
1
0
0
1
1
X
RMOD0
0
1
0
1
0
1
0
1
X
MEANING
Mode 0
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 6
Mode 7
mode > 7 or error in mode byte (note 1)
7.7.17 STAT3
Reading this register clears any DECI interrupts.
Table 15 STAT3 register bits
BIT
NAME
MEANING
7
VALST Registers associated with decoder interrupt valid = 0; Registers invalid = 1. This bit is
a valid/invalid flag for the registers related to the decoder interrupt. After decoder
interrupt, the sub-CPU must read out of all decoder registers before VALST goes
HIGH.
6
−
−
5
CBLK
ECC not performed on current block = 0; ECC has been performed on current
block = 1. This bit will go to logic 1 if ECC correction has been performed on the
current block.
2
−
−
1
−
−
0
−
−
7.7.18 RESET
Writing to this register resets the SAA7380 and initializes all of the registers. The data written determines the host mode
of SAA7380.
Table 16 RESET register bits
BIT 7
BIT 6
BIT 5
reserved
BIT 4
BIT 3
BIT 2
BIT 1
HSEL
BIT 0
The HSEL bits in the RESET register set the host interface mode. After a hardware reset the HSEL bits become 111.
The SAA7380 will then wait until the sub-CPU writes to the RESET register and selects the host mode. After hardware
reset 3-statable pins will be 3-state unless HRD is driven LOW.
1996 Apr 25
20