SAA7182A Datasheet, PDF (17/45 Pages) NXP Semiconductors – Digital Video Encoder EURO-DENC2

Philips Semiconductors
Digital Video Encoder (EURO-DENC2)
Preliminary specification
SAA7182A; SAA7183A
I²C-bus format
Table 5 I²C-bus address; see Table 6
S SLAVE ADDRESS ACK SUBADDRESS ACK
DATA 0
ACK
--------
DATA n ACK P
Table 6 Explanation of Table 5
PART
S
Slave address
ACK
Subaddress (note 2)
DATA
--------
P
DESCRIPTION
START condition
1 0 0 0 1 0 0 X or 1 0 0 0 1 1 0 X (note 1)
acknowledge, generated by the slave
subaddress byte
data byte
continued data bytes and ACKs
STOP condition
Notes
1. X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read, no subaddressing with read.
2. If more than 1 byte DATA is transmitted, then auto-increment of the subaddress is performed.
Slave Receiver
Table 7 Subaddress 26 and 27
DATA BYTE
WSS0 to WSS13
WSSON
LOGIC LEVEL
−
0
1
DESCRIPTION
Wide Screen Signalling bits
3 to 0 = aspect ratio
7 to 4 = enhanced services
10 to 8 = subtitles
13 to 11 = reserved
wide screen signalling output is disabled
wide screen signalling output is enabled
Table 8 Subaddress 38 and 39
DATA BYTE
GY0 to GY4
GCD0 to GCD4
DESCRIPTION
Gain luminance of RGB (Cr, Y and Cb) output, ranging from (1 − ¹⁶⁄₃₂) to (1 + ¹⁵⁄₃₂). Suggested
nominal value = −6 (11010b), depending on external application.
Gain Colour Difference of RGB (Cr, Y and Cb) output, ranging from (1 - ¹⁶⁄₃₂) to (1 + ¹⁵⁄₃₂).
Suggested nominal value = −6 (11010b), depending on external application.
1996 Oct 02
17