PI2EQX5864 Datasheet, PDF (5/18 Pages) Pericom Semiconductor Corporation – 5.0Gbps 4-Lane PCI Express GenII Re-Driver with Equalization, Emphasis, &I2C Control

PI2EQX5864
5.0Gbps 4-Lane PCI Express GenII Re-Driver
with Equalization, Emphasis and I²C Control
Receiver Detect
Automatic Receiver Detection is a feature that can set the number of active channels. By sensing the presence of a load device
on the output, the channel can be automatically enabled for operation. This allows the PI2EQX5864 to configure itself properly
depending on the devices it is communicating with, whether it is a 4-lane, 3-lane, 2-lane or just 1-lane device or adapter card.
Receiver Detect is enabled by the RXD_A, or RXD_B pins, or alternatively via I2C programming. When RXD_A or RXD_B is set
to low, the Receiver Detect operation for that group of channels is disabled, and those channels go directly to 50-Ohm input termi-
nation to ground and 50-Ohm output termination to Vdd (for a valid differential channel input level) or to 2K-Ohm (if the signal
level is less than the threshold level).
The RES_A#, and RES_B# inputs are used to reset the receiver detect state machine to its initial state. RES_A# and RES_B#
control the received detect reset for the A and B group of channels respectively. The start of the receiver detect cycle starts when
RES_A# or RES_B# transitions from low to high.
When a Receiver Detect cycle begins the differential channel pins are enabled with a 2K-Ohm pullup to Vdd. A 50-Ohm Receiver
termination will change the pin level. This pin level is evaluated after a fixed time-out, and the channel is then set into the proper
operating state. The register bits RX50_Ax and RX50_Bx represent the receiver detect result for their specific channels.
The I/O operation table summarizes the relationships and operation of receiver detect and other signals involved with I/O control.
I/O Operation Control
Control Inputs
PD# PRSNT2# RXD_x RES_x#
0
X
X
X
1
1
X
X
1
0
0
0
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
1
1
0
1
1
1
0
1
1
Detection
States
RX50 SIG_x
X
X
X
X
X
X
X
0
X
1
X
X
0
X
1
0
1
1
Data Channel I/O
Input Termination Output Termination
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
2K-Ohm pull-up
50-Ohm pull-
down
50-Ohm pull-
down
Hi-Z
Hi-Z
2K-Ohm pull-up
50-Ohm pull-up
2K-Ohm pull-up
2K-Ohm pull-up
50-Ohm pull-
down
2K-Ohm pull-up
50-Ohm pull-
down
50-Ohm pull-up
Mode
Full IC power down, all chan-
nels disabled
No receiver (defined by
PRSNT2#), all channels
disabled
Channel disabled, output
pulls to Vdd. Receiver detect
reset
Channel enabled, no input
signal, output pulls to Vdd.
Receiver detect disabled
Channel enabled, valid input
signal detected, output driv-
ing. Receiver detect disabled.
Channel disabled. Receiver
detect reset.
Channel disabled, output
pulls to Vdd. Receiver detect
enabled, no receiver detected.
Channel inactive, output pulls
to Vdd. Receiver detect en-
abled, receiver detected. No
input signal
Channel active, valid input
signal detected, output driv-
ing. Receiver detect enabled,
load detected.
07-0277
5
PS8934A
01/21/08