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PI2EQX5864 Datasheet, PDF (13/18 Pages) Pericom Semiconductor Corporation – 5.0Gbps 4-Lane PCI Express GenII Re-Driver with Equalization, Emphasis, &I2C Control
Equalizer
PI2EQX5864
5.0Gbps 4-Lane PCI Express GenII Re-Driver
with Equalization, Emphasis and I2C Control
Symbol
Parameter
Conditions
Min. Typ. Max. Units
JRS-T
Residual jitter
Total
0.3
Ulp-p
JRS-D
Residual jitter
Deterministic
0.2
Ulp-p
JRM
Random jitter
Note 2
1.5
psrms
Notes
1. K28.7 pattern is applied differentially at point A as shown in AC test circuit (see figure).
2. Total jitter does not include the signal source jitter. Total jitter (TJ) = (14.1 × RJ + DJ) where RJ is random RMS jitter and DJ is maximum deter-
ministic jitter. Signal source is a K28.5 ± pattern (00 1111 1010 11 0000 0101) for the deterministic jitter test and K28.7 (0011111000) or equivalent
for random jitter test. Residual jitter is that which remains after equalizing media-induced losses of the environment of Figure 1 or its equivalent.
The deterministic jitter at point B must be from media-induced loss, and not from clock source modulation. Jitter is measured at 0V at point C of
the AC test circuit (see figure).
CML Transmitter Output (VDD = 1.2V ± 0.05V, TA = 0 to 70°C)
Symbol
Parameter
Conditions
Min. Typ. Max.
Units
ZOUT
Output resistance
Single ended
40
50 60
Ohms
ZTX-DIFF-DC
VDIFFP
VTX-DIFFP-P
VTX-C
DC Differential TX
80
Impedance
Output Voltage Swing, |VTX-D+ - VTX-D-|
200
Differential
Differential Peak-to-
peak Ouput Voltage
VTX-DIFFP-P = 2 * | VTX- 0.4
D+ - VTX-D- |
Common-Mode Voltage | VTX-D+ + VTX-D- | / 2
tF, tR
Transition Time
20% to 80% (3)
CTX(1)
AC Coupling Capacitor
Notes:
1. Recommended external coupling capacitor.
Digital I/O DC Specifications (VDD = 1.2V ± 0.05V, TA = 0 to 70°C)
Symbol
Parameter
Conditions
VIH
DC input logic high
VIL
DC input logic low
75
Min.
VDD/2
+0.2
-0.3
VOH
DC output logic high IOH = 4mA
VDD-
0.4
VOL
DC output logic low IOL = 4mA
Vhys
Hysteresis of Schmitt
0.2
trigger input
IIH(1)
Input high current
IIL1(2)
Input low current
-250
IIL2(3)
Input low current
-500
Notes:
1. Includes input signals A1, A2, A4, LB#, MODE#, PRSNT2#, RES_[A:B]#, RXD_[A:B], SCL, SDA
2. For control inputs without pullups: A1, A2, A4, SCL, SDA
3. Control inputs with pull-ups include: LB#, MODE#, PRSNT2#, RES_[A:B]#, RXD_[A:B]
07-0277
13
100 120
1000
2.0
VDD-
0.3
150
200
Ohms
mVp-
p
V
V
ps
nF
Typ. Max.
Units
VDD+0.3 V
VDD/2 V
-0.2
V
0.4
V
V
250
uA
uA
uA
PS8934A
01/21/08