PI2EQX5864 Datasheet, PDF (11/18 Pages) Pericom Semiconductor Corporation – 5.0Gbps 4-Lane PCI Express GenII Re-Driver with Equalization, Emphasis, &I2C Control

I²C Data Transfer
1. Read sequence
PI2EQX5864
PI2EQX5864
ACK _{DATA OUT} ACK
PI2EQX5864
5.0Gbps 4-Lane PCI Express GenII Re-Driver
with Equalization, Emphasis and I²C Control
ACK DATA OUT N NO ACK
I²C Master
DEV SEL ^{R / W}
2. Write sequence
PI2EQX5864
ACK
ACK
ACK
ACK
ACK
I²C Master
DEV SEL ^{R / W} DUMMY BYTE
DATA IN 1
3. Combined sequence
PI2EQX5864
ACK DUMMY BYTE ACK
ACK DATA OUT 1 ACK
DATA IN N
ACK ^{DATA OUT N} NO ACK
I²C Master
DEV SEL ^{R / W}
DEV SEL ^{R / W}
Notes:
1. only block read and block write from the lowest byte
are supported for this application.
2. for some I2C application, an offset address byte will be
presented at the second byte in write command, which
is called dummy byte here and will be simply ignored in
this application for correct interoperation.
07-0277
11
PS8934A
01/21/08