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MN673794 Datasheet, PDF (3/42 Pages) Panasonic Semiconductor – LSI FOR MPEG
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MN673794
2.2 Pin Descriptions
Table 2.2 shows the explanation of the pins of the IC.
Table 2.2 Pin Descriptions (1/4)
Pin No. Pin name
1 CLK18O2
2 VDD3
3 CLK45I
4 VSS
5 VDDI
6 DSF7
7 DSF6
8 VSS
9 DSF5
10 DSF4
11 VDD2
12 DSF3
13 DSF2
14 VSS
15 DSF1
16 DSF0
17 VDD2
18 CASHD
19 CASVD
20 VSS
21 CLK188
22 CLK450
23 VDD2
24 CLK18O1
25 VSS
26 AVSS1
27 TPLL
28 AVDD1
29 AVSS2
30 VREFCK
31 IREFCK
32 COMPCK
33 CK45O
34 AVDD2
35 AVSS3
36 VREFC
37 IREFC
38 COMPC
39 TESTI
40 AVDD3
41 AVSS4
42 VREFY
43 IREFY
44 COMPY
45 TESTK
46 AVDD4
47 AGCO
48 AVSS5
49 CLPOS
50 VREFMA
51 AVDD5
52 ACCO
I/O
Voltage
Type
Drive
Function
O
3.3 V CMOS
4 mA Test output
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
I
Crystal interface
- Test input (VSS)
GND
-
-
- Digital use
Power supply 1.8 V
-
- Internal digital use
I/O 3.3 V CMOS-100 kΩ PD 4 mA Test I/O (open or VSS)
I/O 3.3 V CMOS-100 kΩ PD 4 mA Test I/O (open or VSS)
GND
-
-
- Digital use
I/O 3.3 V CMOS-100 kΩ PD 4 mA Test I/O (open or VSS)
I/O 3.3 V CMOS-100 kΩ PD 4 mA Test I/O (open or VSS)
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
I/O 3.3 V CMOS-100 kΩ PD 4 mA Test I/O (open or VSS)
I/O 3.3 V CMOS-100 kΩ PD 4 mA Test I/O (open or VSS)
GND
-
-
- Digital use
I/O 3.3 V CMOS-100 kΩ PD 4 mA Test I/O (open or VSS)
I/O 3.3 V CMOS-100 kΩ PD 4 mA Test I/O (open or VSS)
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
O
3.3 V CMOS
2 mA Test output
O
3.3 V CMOS
2 mA Test output
GND
-
-
- Digital use
O
3.3 V CMOS
2 mA Clock
O
3.3 V CMOS
2 mA Clock
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
O
3.3 V CMOS
4 mA Test output
GND
-
-
- Digital use
GND
-
-
- Analog use
I/O
- Analog
- Test use
Power supply 3.3 V
-
- Analog use
GND 3.3 V
-
- Analog use
I
- Analog
- Test use (AVSS)
I
- Analog
- Test use (AVSS)
I
- Analog
- Test use (AVDD)
O
- Analog
- Test output
Power supply 3.3 V
-
- D/A (CLK) use
GND 3.3 V
-
- Analog use
I
- Analog
- Test use (AVSS)
I
- Analog
- Test use (AVSS)
I
- Analog
- Test use (AVDD)
O
- Analog
- Test output
Power supply 3.3 V
-
- Analog use
GND
-
-
- Analog use
I
- Analog
- Test use (AVSS)
I
- Analog
- Test use (AVSS)
I
- Analog
- Test use (AVDD)
O
- Analog
- Test output
Power supply 3.3 V
-
- Analog use
O
- Analog
- AGC control output
GND
-
-
- Voltage dividing resistor DAC (ACC, CLAMP, and AGC) use
O
- Analog
- Clamp control output (for sync tip clamp use)
I
- Analog
Power supply 3.3 V
-
Reference voltage input for voltage dividing resistor DAC use
-
(Capacitance coupling to AVSS)
- Voltage dividing resistor DAC (ACC, CLAMP, and AGC) use
O
- Analog
- ACC control output
Clock
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1 MHz
-
1 MHz
-
-
1 MHz
BST
-
-
-
-
-
YES
YES
-
YES
YES
-
YES
YES
-
YES
YES
-
YES
YES
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
SDF00032BEM
3
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