TCC-202 Datasheet, PDF (20/23 Pages) ON Semiconductor – Two-Output PTIC Control IC

TCC−202
Table 20. POWER MODE BIT SETTING IN REGISTER [0X1C]
PM1 PM0
State
Description
0
0
Active
Boost Control Active, VHV set by Digital Interface
VOUT A, BEnabled and Controlled by Digital Interface (Default)
0
1
Startup
Boost Control Active, VHV set by Digital Interface VOUT A, BDisabled
1
0
Low Power
Digital Interface is Active While All Other Circuits are in Low Power Mode
1
1
Reserved
State of Hardware Does Not Change
Table 21. EXTENDED REGISTER WRITE TO UPDATE DAC A, B
Description
SSC
Command Frame
Address Frame
Extended Register
Op Code
<Byte Count> P
<Starting Address>
P
Write TC_INDX_L
and DAC A, B ^{1 0 SA [3,0] 0 0 0 0 0 0 1 0 P 0 0 0 0 0 0 0 1}
P
Data Frame
<Data 8−bit>
P
Turbo−Charge
P
Data Frame
<Data 8−bit>
P
DAC_A [7,0]
P
Data Frame
BP
<Data 8−bit>
P
BP
DAC_B [7,0]
P
BP
Figure 15. Register Read Command Sequence
Table 22. REGISTER READ COMMAND
Description
SSC
Read MIPI−RFFE
Status Register
1
0 SA[3:0] 0
1
Description
Read MIPI−RFFE
0
CFPE
CLE
AFPE
Status Register (Continued)
Command Frame
1
1
1
0
1
0
Data Frame
DFPE
RURE
WURE
BGE
P BP
BP
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