TCC-202 Datasheet, PDF (18/23 Pages) ON Semiconductor – Two-Output PTIC Control IC

TCC−202
This sequence can be used for Read/Write procedure for some other purposes as shown on the following table:
Table 15. OTHER RFFE COMMAND SEQUENCES
Description
SSC
Command Frame
Data Frame
Active Mode
1 0 SA (3,0) 0 1 0 1 1 1 0 0 P 0 0 X X X X X X BP
Startup Mode
1 0 SA (3,0) 0 1 0 1 1 1 0 0 P 0 1 X X X X X X BP
Low Power
1 0 SA (3:0) 0 1 0 1 1 1 0 0 P 1 0 X X X X X X BP
Reserved
1 0 SA (3,0) 0 1 0 1 1 1 0 0 P 1 1 X X X X X X BP
Product ID
1 0 SA (3,0) 0 1 0 1 1 1 0 1 P 0 0 1 0 0 0 0 0/1 BP
Manufacturer ID
1 0 SA (3:0) 0 1 0 1 1 1 1 0 P 0 0 1 0 1 1 1 0 BP
Manufacturer USID
1 0 SA (3,0) 0 1 0 1 1 1 1 1 P 0 0 0 1
USID
BP
Extended Register Write Command Sequence
In order to access more than one register in one sequence
this message could be used. Most commonly it will be used
for loading three DAC registers at the same time. The four
LSBs of the Extended Register Write Command Frame
determine the number of bytes that will be written by the
Command Sequence. A value of 0b0000 would write one
byte and a value of 0b1111 would write sixteen bytes.
If more than one byte is to be written, the register address
in the Command Sequence contains the address of the first
extended register that will be written to and the Slave’s local
extended register address shall be automatically
incremented by one for each byte written up to address 0x1F,
starting from the address indicated in the Address Frame.
Figure 14. Extended Register Write Command Sequence
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