TCC-202 Datasheet, PDF (12/23 Pages) ON Semiconductor – Two-Output PTIC Control IC

TCC−202
Table 12. REGISTER DETAILS The following are the details of the available RFFE registers:
Register RFFE:
RFFE_REG_0x00
Address RFFE A[4:0]:
Reset Source: nreset_dig or SWR = ‘1’ or PWR_MODE = ‘01’ (transition through STARTUP mode)
0x00
6
5
4
3
2
1
0
Bits
SS Enable
Reserved
Reserved
DAC A (Note 6) DAC B (Note 6)
Reserved
Reserved
Reset
W−1
U−0
U−0
W−0
W−0
U−0
U−0
6. When any of the bits [3:2] are written with ‘0’, the corresponding DAC is disabled, but the Turbo−Charge process which is already started, will
not be stopped.
7. If all bits [3:2] are ‘0’, then incoming DAC messages will be ignored, until at least one of [3:1] is set ‘1’.
Bit [6]: Spread Spectrum enable
0: SS disabled
1: SS enabled
Bit [3]: Control DAC A
0: off (default)
1: enabled
Bit [2]: Control DAC B
0: off (default)
1: enabled
Register RFFE:
RFFE_REG_0x01
Address RFFE A[4:0]:
Reset Source: nreset_dig or SWR = ‘1’ or PWR_MODE = ‘01’ (transition through STARTUP mode)
Bits
Reset
7
W−0
6
W−0
5
W−0
4
W−0
3
Reserved
W−0
2
W−0
0x01
1
W−0
0
W−0
Register RFFE:
RFFE_REG_0x02
Address RFFE A[4:0]:
Reset Source: nreset_dig or SWR = ‘1’ or PWR_MODE = ‘01’ (transition through STARTUP mode)
Bits
Reset
7
Reserved
U−0
6
W−0
5
W−0
4
W−0
3
2
DAC A value [6:0]
W−0
W−0
1
W−0
0x02
0
W−0
Register RFFE:
RFFE_REG_0x03
Address RFFE A[4:0]:
Reset Source: nreset_dig or SWR = ‘1’ or PWR_MODE = ‘01’ (transition through STARTUP mode)
Bits
Reset
7
Not Used
W−0
6
W−0
5
W−0
4
W−0
3
2
DAC B value [6:0]
W−0
W−0
1
W−0
0x03
0
W−0
TC_STP_DACx [1:0]
00
01 (default)
10
11
Turbo Steps for TCDLY [us]
3
5
7
9
Register RFFE:
RFFE_REG_0x12
Address RFFE A[4:0]:
Reset Source: nreset_dig or SWR = ‘1’ or PWR_MODE = ‘01’ (transition through STARTUP mode)
Bits
Reset
7
6
Reserved
U−0
U−0
5
4
Reserved
U−0
U−0
3
2
TC_STP_DAC_B
W−0
W−1
0x12
1
0
TC_STP_DAC_A
W−0
W−1
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