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AMIS-30522 Datasheet, PDF (15/29 Pages) AMI SEMICONDUCTOR – Micro-stepping Motor Driver
AMIS-30522
8.6.4. Charge Pump Failure
The charge pump is an important circuit that guarantees low Rdson for all drivers, especially for low supply voltages. If supply
voltage is too low or external components are not properly connected to guarantee Rdson of the drivers, then the bit <CPFAIL> is
set in Table 29. Also after POR the charge pump voltage will need some time to exceed the required threshold. During that time
<CPFAIL> will be set to “1”.
8.6.5. Error Output
This is a digital output to flag a problem to the external microcontroller. The signal on this output is active low and the logic
combination of:
NOT(ERRB) = <TW> OR <TSD> OR <OVCXij> OR < OVCYij> OR <OPENi> OR <CPFAIL>
8.7 Logic Supply Regulator
AMIS-30522 has an on-chip 5V low-drop regulator with external capacitor to supply the digital part of the chip, some low-voltage
analog blocks and external circuitry. The voltage is derived from an internal bandgap reference. To calculate the available drive-
current for external circuitry, the specified Iload should be reduced with the consumption of internal circuitry (unloaded outputs) and
the loads connected to logic outputs. See Error! Reference source not found..
8.8 Power-On Reset (POR) Function
The open drain output pin PORB/WD provides an “active low” reset for external purposes. At power-up of AMIS-30522, this pin will
be kept low for some time to reset for example an external microcontroller. A small analog filter avoids resetting due to spikes or
noise on the VDD supply.
VBB
VDD
tPU
t
tPD
VDDH
VDDL
t
< tRF
POR/WD pin
tPOR
tRF
Figure 14: Power-on-Reset Timing Diagram
PC20070604.8
8.9 Watchdog Function
The watchdog function is enabled/disabled through <WDEN> bit (Table 14). Once this bit has been set to “1” (watchdog enable), the
microcontroller needs to re-write this bit to clear an internal timer before the watchdog timeout interval expires. In case the timer is
activated and WDEN is acknowledged too early (before tWDPR) or not within the interval (after tWDTO), then a reset of the
microcontroller will occur through PORB/WD pin. In addition, a warm/cold boot bit <WD> is available in Table 29 for further
processing when the external microcontroller is alive again.
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