DS50PCI401 Datasheet, PDF (9/32 Pages) National Semiconductor (TI) – 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver with Equalization and De-Emphasis

Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VDD)
-0.5V to +3.0V
LVCMOS Input/Output Voltage
-0.5V to +4.0V
CML Input Voltage
-0.5V to (VDD+0.5V)
CML Input Current
-30 to +30 mA
LPDS Output Voltage
-0.5V to (VDD+0.5V)
Analog (SD_TH)
-0.5V to (VDD+0.5V)
Junction Temperature
+125°C
Storage Temperature
-40°C to +125°C
Lead Temperature Range
Soldering (4 sec.)
+260°C
Maximum Package Power Dissipation at 25°C
SQA54A Package
4.21 W
Derate SQA54A Package
52.6mW/°C above +25°C
ESD Rating
HBM, STD - JESD22-A114C
MM, STD - JESD22-A115-A
CDM, STD - JESD22-C101-C
Thermal Resistance
 θ_JC
 θ_JA, No Airflow, 4 layer JEDEC
≥6 kV
≥250 V
≥1250 V
11.5°C/W
19.1°C/W
Recommended Operating
Conditions
Supply Voltage
V_DD to GND
Ambient Temperature
SMBus (SDA, SCL)
Supply Noise Tolerance
up to 50Mhz (Note 4)
Min
2.375
-10
Typ Max Units
2.5 2.625 V
25 +85 °C
3.6 V
100 mV
pp
Electrical Characteristics
Over recommended operating supply and temperature ranges with default register settings unless other specified. (Notes 2, 3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
POWER (Note 12)
EQX=Float, DEX=0,
PD
Power Dissipation
VOD=1Vpp ,PRSNT=0
PRSNT=1, ENSMB=0
758
950
mW
0.92
1.125
mW
LVCMOS / LVTTL DC SPECIFICATIONS
V_IH
High Level Input
(Note 14)
Voltage
2
3.6
V
V_IL
Low Level Input
(Note 14)
Voltage
0
0.8
V
V_OH
High Level Output
SMBUS open drain V_OH set by
Voltage
pullup Resistor
V
V_OL
Low Level Output
I_OL = 4mA
Voltage
0.4
V
I_IH
Input High Current
V_IN = 3.6V , LVCMOS
-15
+15
V_IN = 3.6V , w/
-15
FLOAT,PULLDOWN input
+120
μA
I_IL
Input Low Current
V_IN = 0V
-15
V_IN = 0V, w/FLOAT input
-80
+15
+15
μA
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